diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2007-03-02 15:42:04 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2008-01-29 05:14:57 -0500 |
commit | 0ab7aefc4d43a6dee26c891b41ef9c7a67d2379b (patch) | |
tree | 4a627b7079979ad43b08cef297b2a6eb78d0a78e /include/asm-mips | |
parent | 92b1e6a64a8d9d5ed3ec8797eed8b36e2164a410 (diff) |
[MIPS] MT: Scheduler support for SMT
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips')
-rw-r--r-- | include/asm-mips/cpu-info.h | 5 | ||||
-rw-r--r-- | include/asm-mips/smp.h | 3 | ||||
-rw-r--r-- | include/asm-mips/topology.h | 16 |
3 files changed, 23 insertions, 1 deletions
diff --git a/include/asm-mips/cpu-info.h b/include/asm-mips/cpu-info.h index ed5c02c6afbb..0c5a358863f3 100644 --- a/include/asm-mips/cpu-info.h +++ b/include/asm-mips/cpu-info.h | |||
@@ -55,6 +55,7 @@ struct cpuinfo_mips { | |||
55 | struct cache_desc scache; /* Secondary cache */ | 55 | struct cache_desc scache; /* Secondary cache */ |
56 | struct cache_desc tcache; /* Tertiary/split secondary cache */ | 56 | struct cache_desc tcache; /* Tertiary/split secondary cache */ |
57 | int srsets; /* Shadow register sets */ | 57 | int srsets; /* Shadow register sets */ |
58 | int core; /* physical core number */ | ||
58 | #if defined(CONFIG_MIPS_MT_SMTC) | 59 | #if defined(CONFIG_MIPS_MT_SMTC) |
59 | /* | 60 | /* |
60 | * In the MIPS MT "SMTC" model, each TC is considered | 61 | * In the MIPS MT "SMTC" model, each TC is considered |
@@ -63,8 +64,10 @@ struct cpuinfo_mips { | |||
63 | * to all TCs within the same VPE. | 64 | * to all TCs within the same VPE. |
64 | */ | 65 | */ |
65 | int vpe_id; /* Virtual Processor number */ | 66 | int vpe_id; /* Virtual Processor number */ |
66 | int tc_id; /* Thread Context number */ | ||
67 | #endif /* CONFIG_MIPS_MT */ | 67 | #endif /* CONFIG_MIPS_MT */ |
68 | #ifdef CONFIG_MIPS_MT_SMTC | ||
69 | int tc_id; /* Thread Context number */ | ||
70 | #endif | ||
68 | void *data; /* Additional data */ | 71 | void *data; /* Additional data */ |
69 | } __attribute__((aligned(SMP_CACHE_BYTES))); | 72 | } __attribute__((aligned(SMP_CACHE_BYTES))); |
70 | 73 | ||
diff --git a/include/asm-mips/smp.h b/include/asm-mips/smp.h index dc770025a9b0..23265879cee9 100644 --- a/include/asm-mips/smp.h +++ b/include/asm-mips/smp.h | |||
@@ -20,6 +20,9 @@ | |||
20 | #include <linux/cpumask.h> | 20 | #include <linux/cpumask.h> |
21 | #include <asm/atomic.h> | 21 | #include <asm/atomic.h> |
22 | 22 | ||
23 | extern int smp_num_siblings; | ||
24 | extern cpumask_t cpu_sibling_map[]; | ||
25 | |||
23 | #define raw_smp_processor_id() (current_thread_info()->cpu) | 26 | #define raw_smp_processor_id() (current_thread_info()->cpu) |
24 | 27 | ||
25 | /* Map from cpu id to sequential logical cpu number. This will only | 28 | /* Map from cpu id to sequential logical cpu number. This will only |
diff --git a/include/asm-mips/topology.h b/include/asm-mips/topology.h index 0440fb9f2180..259145e07e97 100644 --- a/include/asm-mips/topology.h +++ b/include/asm-mips/topology.h | |||
@@ -1 +1,17 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2007 by Ralf Baechle | ||
7 | */ | ||
8 | #ifndef __ASM_TOPOLOGY_H | ||
9 | #define __ASM_TOPOLOGY_H | ||
10 | |||
1 | #include <topology.h> | 11 | #include <topology.h> |
12 | |||
13 | #ifdef CONFIG_SMP | ||
14 | #define smt_capable() (smp_num_siblings > 1) | ||
15 | #endif | ||
16 | |||
17 | #endif /* __ASM_TOPOLOGY_H */ | ||