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authorThomas Bogendoerfer <tsbogend@alpha.franken.de>2008-07-14 09:11:40 -0400
committerRalf Baechle <ralf@linux-mips.org>2008-07-15 13:44:38 -0400
commitc660729501894e0b88054ad4b66a5f98a1a2a37e (patch)
tree64354f6e70a6b9bf104c5a72b2b7d3944783b86c /include/asm-mips
parent9528356308ecd2fb6368472615996a8602c02964 (diff)
[MIPS] Remove mips_machtype from ARC based machines
This is the ARC part of the mips_machtype removal. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips')
-rw-r--r--include/asm-mips/bootinfo.h21
1 files changed, 0 insertions, 21 deletions
diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h
index c70848d4f632..653096a69d16 100644
--- a/include/asm-mips/bootinfo.h
+++ b/include/asm-mips/bootinfo.h
@@ -26,13 +26,6 @@
26#define MACH_UNKNOWN 0 /* whatever... */ 26#define MACH_UNKNOWN 0 /* whatever... */
27 27
28/* 28/*
29 * Valid machtype values for group JAZZ
30 */
31#define MACH_ACER_PICA_61 0 /* Acer PICA-61 (PICA1) */
32#define MACH_MIPS_MAGNUM_4000 1 /* Mips Magnum 4000 "RC4030" */
33#define MACH_OLIVETTI_M700 2 /* Olivetti M700-10 (-15 ??) */
34
35/*
36 * Valid machtype for group DEC 29 * Valid machtype for group DEC
37 */ 30 */
38#define MACH_DSUNKNOWN 0 31#define MACH_DSUNKNOWN 0
@@ -48,20 +41,6 @@
48#define MACH_DS5900 10 /* DECsystem 5900 */ 41#define MACH_DS5900 10 /* DECsystem 5900 */
49 42
50/* 43/*
51 * Valid machtype for group SNI_RM
52 */
53#define MACH_SNI_RM200_PCI 0 /* RM200/RM300/RM400 PCI series */
54
55/*
56 * Valid machtype for group SGI
57 */
58#define MACH_SGI_IP22 0 /* Indy, Indigo2, Challenge S */
59#define MACH_SGI_IP27 1 /* Origin 200, Origin 2000, Onyx 2 */
60#define MACH_SGI_IP28 2 /* Indigo2 Impact */
61#define MACH_SGI_IP32 3 /* O2 */
62#define MACH_SGI_IP30 4 /* Octane, Octane2 */
63
64/*
65 * Valid machtype for group LASAT 44 * Valid machtype for group LASAT
66 */ 45 */
67#define MACH_LASAT_100 0 /* Masquerade II/SP100/SP50/SP25 */ 46#define MACH_LASAT_100 0 /* Masquerade II/SP100/SP50/SP25 */