diff options
author | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2007-06-20 17:36:47 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2007-07-10 12:33:03 -0400 |
commit | 06cf5583fd9ac782cf34996cdabb48afdf478e37 (patch) | |
tree | 45e27ae328e9e3f021a29cc8e8b95d3bef618255 /include/asm-mips | |
parent | 68bc00e31143ad8bfa435425e0a11e9b3998911d (diff) |
[MIPS] SNI RM updates
- use RTC_CLASS instead of GEN_RTC
- get rid of ds1216 in favour of a RTC_CLASS driver
- use correct console device for older RM400
- use physical addresses for 82596 device
- use 128 byte L1 cache line size (this is needed because most of the
SNI caches are using 128 L2 cache lines)
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips')
-rw-r--r-- | include/asm-mips/sni.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/include/asm-mips/sni.h b/include/asm-mips/sni.h index f257509b914f..ddaf36a1e389 100644 --- a/include/asm-mips/sni.h +++ b/include/asm-mips/sni.h | |||
@@ -146,9 +146,6 @@ extern unsigned int sni_brd_type; | |||
146 | #define SNI_A20R_IRQ_BASE MIPS_CPU_IRQ_BASE | 146 | #define SNI_A20R_IRQ_BASE MIPS_CPU_IRQ_BASE |
147 | #define SNI_A20R_IRQ_TIMER (SNI_A20R_IRQ_BASE+5) | 147 | #define SNI_A20R_IRQ_TIMER (SNI_A20R_IRQ_BASE+5) |
148 | 148 | ||
149 | #define SNI_DS1216_A20R_BASE 0xbc081ffc | ||
150 | #define SNI_DS1216_RM200_BASE 0xbcd41ffc | ||
151 | |||
152 | #define SNI_PCIT_INT_REG 0xbfff000c | 149 | #define SNI_PCIT_INT_REG 0xbfff000c |
153 | 150 | ||
154 | #define SNI_PCIT_INT_START 24 | 151 | #define SNI_PCIT_INT_START 24 |