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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-11 12:59:50 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-11 12:59:50 -0400
commitf2c60ed038dedcc43a0eb3ef4e0602741ba90384 (patch)
tree1d06b6c080e1c164d87b66f8cc4b13203378b85a /include/asm-mips
parentcabca0cb0d0e8579428d8f8c3f606e2f01d26d14 (diff)
parent3f2d560e9029ec0b7edf8be0c32425f4bb57d582 (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (28 commits) [MIPS] Rework cobalt_board_id [MIPS] Use RTC_CMOS for Cobalt [MIPS] Use platform_device for Cobalt UART [MIPS] Separate Alchemy processor based boards config [MIPS] Fix build error in atomic64_cmpxchg [MIPS] Run checksyscalls for N32 and O32 ABI [MIPS] tlbex: use __maybe_unused [MIPS] excite: use __maybe_unused [MIPS] Add extern cobalt_board_id [MIPS] Remove unused CONFIG_TOSHIBA_BOARDS [MIPS] Rename tb0229_defconfig to tb0219_defconfig [MIPS] Update tb0229_defconfig; add CONFIG_GPIO_TB0219. [MIPS] Add minimum defconfig for RBHMA4200 [MIPS] SB1: Build fix. [MIPS] Drop __devinit tag from allocate_irqno() and free_irqno() [MIPS] clocksource: use CLOCKSOURCE_MASK() macro [MIPS] Remove LIMITED_DMA support [MIPS] Remove Momenco Jaguar ATX support [MIPS] Remove Momenco Ocelot G support [MIPS] FPU hazard handling ...
Diffstat (limited to 'include/asm-mips')
-rw-r--r--include/asm-mips/atomic.h2
-rw-r--r--include/asm-mips/bootinfo.h4
-rw-r--r--include/asm-mips/fpu.h23
-rw-r--r--include/asm-mips/hazards.h32
-rw-r--r--include/asm-mips/highmem.h42
-rw-r--r--include/asm-mips/mach-cobalt/cobalt.h2
-rw-r--r--include/asm-mips/mach-ja/cpu-feature-overrides.h45
-rw-r--r--include/asm-mips/mach-ja/spaces.h20
-rw-r--r--include/asm-mips/mips-boards/malta.h4
-rw-r--r--include/asm-mips/msc01_ic.h5
-rw-r--r--include/asm-mips/page.h4
-rw-r--r--include/asm-mips/serial.h41
-rw-r--r--include/asm-mips/system.h5
13 files changed, 49 insertions, 180 deletions
diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h
index 62daa746a9c9..1b60624dab7e 100644
--- a/include/asm-mips/atomic.h
+++ b/include/asm-mips/atomic.h
@@ -689,7 +689,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
689} 689}
690 690
691#define atomic64_cmpxchg(v, o, n) \ 691#define atomic64_cmpxchg(v, o, n) \
692 (((__typeof__((v)->counter)))cmpxchg(&((v)->counter), (o), (n))) 692 ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
693#define atomic64_xchg(v, new) (xchg(&((v)->counter), (new))) 693#define atomic64_xchg(v, new) (xchg(&((v)->counter), (new)))
694 694
695/** 695/**
diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h
index dbf834f4dac4..b0c329783ac5 100644
--- a/include/asm-mips/bootinfo.h
+++ b/include/asm-mips/bootinfo.h
@@ -119,9 +119,9 @@
119 */ 119 */
120#define MACH_GROUP_MOMENCO 12 /* Momentum Boards */ 120#define MACH_GROUP_MOMENCO 12 /* Momentum Boards */
121#define MACH_MOMENCO_OCELOT 0 121#define MACH_MOMENCO_OCELOT 0
122#define MACH_MOMENCO_OCELOT_G 1 122#define MACH_MOMENCO_OCELOT_G 1 /* no more supported (may 2007) */
123#define MACH_MOMENCO_OCELOT_C 2 123#define MACH_MOMENCO_OCELOT_C 2
124#define MACH_MOMENCO_JAGUAR_ATX 3 124#define MACH_MOMENCO_JAGUAR_ATX 3 /* no more supported (may 2007) */
125#define MACH_MOMENCO_OCELOT_3 4 125#define MACH_MOMENCO_OCELOT_3 4
126 126
127/* 127/*
diff --git a/include/asm-mips/fpu.h b/include/asm-mips/fpu.h
index b414a7d9db43..483685b1592e 100644
--- a/include/asm-mips/fpu.h
+++ b/include/asm-mips/fpu.h
@@ -16,6 +16,7 @@
16#include <asm/mipsregs.h> 16#include <asm/mipsregs.h>
17#include <asm/cpu.h> 17#include <asm/cpu.h>
18#include <asm/cpu-features.h> 18#include <asm/cpu-features.h>
19#include <asm/hazards.h>
19#include <asm/bitops.h> 20#include <asm/bitops.h>
20#include <asm/processor.h> 21#include <asm/processor.h>
21#include <asm/current.h> 22#include <asm/current.h>
@@ -38,34 +39,16 @@ extern void _init_fpu(void);
38extern void _save_fp(struct task_struct *); 39extern void _save_fp(struct task_struct *);
39extern void _restore_fp(struct task_struct *); 40extern void _restore_fp(struct task_struct *);
40 41
41#if defined(CONFIG_CPU_SB1)
42#define __enable_fpu_hazard() \
43do { \
44 asm(".set push \n\t" \
45 ".set mips64 \n\t" \
46 ".set noreorder \n\t" \
47 "ssnop \n\t" \
48 "bnezl $0, .+4 \n\t" \
49 "ssnop \n\t" \
50 ".set pop"); \
51} while (0)
52#else
53#define __enable_fpu_hazard() \
54do { \
55 asm("nop;nop;nop;nop"); /* max. hazard */ \
56} while (0)
57#endif
58
59#define __enable_fpu() \ 42#define __enable_fpu() \
60do { \ 43do { \
61 set_c0_status(ST0_CU1); \ 44 set_c0_status(ST0_CU1); \
62 __enable_fpu_hazard(); \ 45 enable_fpu_hazard(); \
63} while (0) 46} while (0)
64 47
65#define __disable_fpu() \ 48#define __disable_fpu() \
66do { \ 49do { \
67 clear_c0_status(ST0_CU1); \ 50 clear_c0_status(ST0_CU1); \
68 /* We don't care about the c0 hazard here */ \ 51 disable_fpu_hazard(); \
69} while (0) 52} while (0)
70 53
71#define enable_fpu() \ 54#define enable_fpu() \
diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h
index e50c77e69cb5..d9119f43f9aa 100644
--- a/include/asm-mips/hazards.h
+++ b/include/asm-mips/hazards.h
@@ -178,4 +178,36 @@ ASMMACRO(back_to_back_c0_hazard,
178 178
179#endif 179#endif
180 180
181
182/* FPU hazards */
183
184#if defined(CONFIG_CPU_SB1)
185ASMMACRO(enable_fpu_hazard,
186 .set push;
187 .set mips64;
188 .set noreorder;
189 _ssnop;
190 bnezl $0,.+4;
191 _ssnop;
192 .set pop
193)
194ASMMACRO(disable_fpu_hazard,
195)
196
197#elif defined(CONFIG_CPU_MIPSR2)
198ASMMACRO(enable_fpu_hazard,
199 _ehb
200)
201ASMMACRO(disable_fpu_hazard,
202 _ehb
203)
204#else
205ASMMACRO(enable_fpu_hazard,
206 nop; nop; nop; nop
207)
208ASMMACRO(disable_fpu_hazard,
209 _ehb
210)
211#endif
212
181#endif /* _ASM_HAZARDS_H */ 213#endif /* _ASM_HAZARDS_H */
diff --git a/include/asm-mips/highmem.h b/include/asm-mips/highmem.h
index f8c8182f7f2e..4d6bd5c31c7b 100644
--- a/include/asm-mips/highmem.h
+++ b/include/asm-mips/highmem.h
@@ -48,46 +48,6 @@ extern pte_t *pkmap_page_table;
48extern void * kmap_high(struct page *page); 48extern void * kmap_high(struct page *page);
49extern void kunmap_high(struct page *page); 49extern void kunmap_high(struct page *page);
50 50
51/*
52 * CONFIG_LIMITED_DMA is for systems with DMA limitations such as Momentum's
53 * Jaguar ATX. This option exploits the highmem code in the kernel so is
54 * always enabled together with CONFIG_HIGHMEM but at this time doesn't
55 * actually add highmem functionality.
56 */
57
58#ifdef CONFIG_LIMITED_DMA
59
60/*
61 * These are the default functions for the no-highmem case from
62 * <linux/highmem.h>
63 */
64static inline void *kmap(struct page *page)
65{
66 might_sleep();
67 return page_address(page);
68}
69
70#define kunmap(page) do { (void) (page); } while (0)
71
72static inline void *kmap_atomic(struct page *page, enum km_type type)
73{
74 pagefault_disable();
75 return page_address(page);
76}
77
78static inline void kunmap_atomic(void *kvaddr, enum km_type type)
79{
80 pagefault_enable();
81}
82
83#define kmap_atomic_pfn(pfn, idx) kmap_atomic(pfn_to_page(pfn), (idx))
84
85#define kmap_atomic_to_page(ptr) virt_to_page(ptr)
86
87#define flush_cache_kmaps() do { } while (0)
88
89#else /* LIMITED_DMA */
90
91extern void *__kmap(struct page *page); 51extern void *__kmap(struct page *page);
92extern void __kunmap(struct page *page); 52extern void __kunmap(struct page *page);
93extern void *__kmap_atomic(struct page *page, enum km_type type); 53extern void *__kmap_atomic(struct page *page, enum km_type type);
@@ -103,8 +63,6 @@ extern struct page *__kmap_atomic_to_page(void *ptr);
103 63
104#define flush_cache_kmaps() flush_cache_all() 64#define flush_cache_kmaps() flush_cache_all()
105 65
106#endif /* LIMITED_DMA */
107
108#endif /* __KERNEL__ */ 66#endif /* __KERNEL__ */
109 67
110#endif /* _ASM_HIGHMEM_H */ 68#endif /* _ASM_HIGHMEM_H */
diff --git a/include/asm-mips/mach-cobalt/cobalt.h b/include/asm-mips/mach-cobalt/cobalt.h
index 24a8d51a55a3..684a501c04cf 100644
--- a/include/asm-mips/mach-cobalt/cobalt.h
+++ b/include/asm-mips/mach-cobalt/cobalt.h
@@ -69,6 +69,8 @@
69#define COBALT_BRD_ID_QUBE2 0x5 69#define COBALT_BRD_ID_QUBE2 0x5
70#define COBALT_BRD_ID_RAQ2 0x6 70#define COBALT_BRD_ID_RAQ2 0x6
71 71
72extern int cobalt_board_id;
73
72#define PCI_CFG_SET(devfn,where) \ 74#define PCI_CFG_SET(devfn,where) \
73 GT_WRITE(GT_PCI0_CFGADDR_OFS, (0x80000000 | (PCI_SLOT (devfn) << 11) | \ 75 GT_WRITE(GT_PCI0_CFGADDR_OFS, (0x80000000 | (PCI_SLOT (devfn) << 11) | \
74 (PCI_FUNC (devfn) << 8) | (where))) 76 (PCI_FUNC (devfn) << 8) | (where)))
diff --git a/include/asm-mips/mach-ja/cpu-feature-overrides.h b/include/asm-mips/mach-ja/cpu-feature-overrides.h
deleted file mode 100644
index 84b6dead0e8a..000000000000
--- a/include/asm-mips/mach-ja/cpu-feature-overrides.h
+++ /dev/null
@@ -1,45 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003, 2004 Ralf Baechle
7 */
8#ifndef __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H
9#define __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H
10
11/*
12 * Momentum Jaguar ATX always has the RM9000 processor.
13 */
14#define cpu_has_watch 1
15#define cpu_has_mips16 0
16#define cpu_has_divec 0
17#define cpu_has_vce 0
18#define cpu_has_cache_cdex_p 0
19#define cpu_has_cache_cdex_s 0
20#define cpu_has_prefetch 1
21#define cpu_has_mcheck 0
22#define cpu_has_ejtag 0
23
24#define cpu_has_llsc 1
25#define cpu_has_vtag_icache 0
26#define cpu_has_dc_aliases 0
27#define cpu_has_ic_fills_f_dc 0
28#define cpu_has_dsp 0
29#define cpu_icache_snoops_remote_store 0
30
31#define cpu_has_nofpuex 0
32#define cpu_has_64bits 1
33
34#define cpu_has_inclusive_pcaches 0
35
36#define cpu_dcache_line_size() 32
37#define cpu_icache_line_size() 32
38#define cpu_scache_line_size() 32
39
40#define cpu_has_mips32r1 0
41#define cpu_has_mips32r2 0
42#define cpu_has_mips64r1 0
43#define cpu_has_mips64r2 0
44
45#endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/mach-ja/spaces.h b/include/asm-mips/mach-ja/spaces.h
deleted file mode 100644
index 8466a0e69c79..000000000000
--- a/include/asm-mips/mach-ja/spaces.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 1999, 2000, 03, 04 Ralf Baechle
7 * Copyright (C) 2000, 2002 Maciej W. Rozycki
8 * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc.
9 */
10#ifndef __ASM_MACH_JA_SPACES_H
11#define __ASM_MACH_JA_SPACES_H
12
13/*
14 * Memory above this physical address will be considered highmem.
15 */
16#define HIGHMEM_START 0x08000000UL
17
18#include_next <spaces.h>
19
20#endif /* __ASM_MACH_JA_SPACES_H */
diff --git a/include/asm-mips/mips-boards/malta.h b/include/asm-mips/mips-boards/malta.h
index b0ba3c5a921e..eec91001bb65 100644
--- a/include/asm-mips/mips-boards/malta.h
+++ b/include/asm-mips/mips-boards/malta.h
@@ -25,6 +25,10 @@
25#include <asm/mips-boards/msc01_pci.h> 25#include <asm/mips-boards/msc01_pci.h>
26#include <asm/gt64120.h> 26#include <asm/gt64120.h>
27 27
28/* Mips interrupt controller found in SOCit variations */
29#define MIPS_MSC01_IC_REG_BASE 0x1bc40000
30#define MIPS_SOCITSC_IC_REG_BASE 0x1ffa0000
31
28/* 32/*
29 * Malta I/O ports base address for the Galileo GT64120 and Algorithmics 33 * Malta I/O ports base address for the Galileo GT64120 and Algorithmics
30 * Bonito system controllers. 34 * Bonito system controllers.
diff --git a/include/asm-mips/msc01_ic.h b/include/asm-mips/msc01_ic.h
index aa7ad9a71762..7989b9ffc1d2 100644
--- a/include/asm-mips/msc01_ic.h
+++ b/include/asm-mips/msc01_ic.h
@@ -94,10 +94,7 @@
94/* 94/*
95 * MIPS System controller interrupt register base. 95 * MIPS System controller interrupt register base.
96 * 96 *
97 * FIXME - are these macros specific to Malta and co or to the MSC? If the
98 * latter, they should be moved elsewhere.
99 */ 97 */
100#define MIPS_MSC01_IC_REG_BASE 0x1bc40000
101 98
102/***************************************************************************** 99/*****************************************************************************
103 * Absolute register addresses 100 * Absolute register addresses
@@ -144,7 +141,7 @@ typedef struct msc_irqmap {
144#define MSC01_IRQ_LEVEL 0 141#define MSC01_IRQ_LEVEL 0
145#define MSC01_IRQ_EDGE 1 142#define MSC01_IRQ_EDGE 1
146 143
147extern void __init init_msc_irqs(unsigned int base, msc_irqmap_t *imp, int nirq); 144extern void __init init_msc_irqs(unsigned long icubase, unsigned int base, msc_irqmap_t *imp, int nirq);
148extern void ll_msc_irq(void); 145extern void ll_msc_irq(void);
149 146
150#endif /* __ASM_MIPS_BOARDS_MSC01_IC_H */ 147#endif /* __ASM_MIPS_BOARDS_MSC01_IC_H */
diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h
index d3fbd83ff545..5c3239dad0f2 100644
--- a/include/asm-mips/page.h
+++ b/include/asm-mips/page.h
@@ -190,10 +190,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
190#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE) 190#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE)
191#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET) 191#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET)
192 192
193#ifdef CONFIG_LIMITED_DMA
194#define WANT_PAGE_VIRTUAL
195#endif
196
197#include <asm-generic/memory_model.h> 193#include <asm-generic/memory_model.h>
198#include <asm-generic/page.h> 194#include <asm-generic/page.h>
199 195
diff --git a/include/asm-mips/serial.h b/include/asm-mips/serial.h
index d7a65135d837..ce51213d84f9 100644
--- a/include/asm-mips/serial.h
+++ b/include/asm-mips/serial.h
@@ -81,25 +81,6 @@
81#define STD_SERIAL_PORT_DEFNS 81#define STD_SERIAL_PORT_DEFNS
82#endif /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */ 82#endif /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */
83 83
84#ifdef CONFIG_MOMENCO_JAGUAR_ATX
85/* Ordinary NS16552 duart with a 20MHz crystal. */
86#define JAGUAR_ATX_UART_CLK 20000000
87#define JAGUAR_ATX_BASE_BAUD (JAGUAR_ATX_UART_CLK / 16)
88
89#define JAGUAR_ATX_SERIAL1_IRQ 6
90#define JAGUAR_ATX_SERIAL1_BASE 0xfd000023L
91
92#define _JAGUAR_ATX_SERIAL_INIT(int, base) \
93 { .baud_base = JAGUAR_ATX_BASE_BAUD, irq: int, \
94 .flags = (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
95 .iomem_base = (u8 *) base, iomem_reg_shift: 2, \
96 io_type: SERIAL_IO_MEM }
97#define MOMENCO_JAGUAR_ATX_SERIAL_PORT_DEFNS \
98 _JAGUAR_ATX_SERIAL_INIT(JAGUAR_ATX_SERIAL1_IRQ, JAGUAR_ATX_SERIAL1_BASE)
99#else
100#define MOMENCO_JAGUAR_ATX_SERIAL_PORT_DEFNS
101#endif
102
103#ifdef CONFIG_MOMENCO_OCELOT_3 84#ifdef CONFIG_MOMENCO_OCELOT_3
104#define OCELOT_3_BASE_BAUD ( 20000000 / 16 ) 85#define OCELOT_3_BASE_BAUD ( 20000000 / 16 )
105#define OCELOT_3_SERIAL_IRQ 6 86#define OCELOT_3_SERIAL_IRQ 6
@@ -134,27 +115,6 @@
134#define MOMENCO_OCELOT_SERIAL_PORT_DEFNS 115#define MOMENCO_OCELOT_SERIAL_PORT_DEFNS
135#endif 116#endif
136 117
137#ifdef CONFIG_MOMENCO_OCELOT_G
138/* Ordinary NS16552 duart with a 20MHz crystal. */
139#define OCELOT_G_BASE_BAUD ( 20000000 / 16 )
140
141#define OCELOT_G_SERIAL1_IRQ 4
142#if 0
143#define OCELOT_G_SERIAL1_BASE 0xe0001020
144#else
145#define OCELOT_G_SERIAL1_BASE 0xfd000020
146#endif
147
148#define _OCELOT_G_SERIAL_INIT(int, base) \
149 { .baud_base = OCELOT_G_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS,\
150 .iomem_base = (u8 *) base, .iomem_reg_shift = 2, \
151 .io_type = SERIAL_IO_MEM }
152#define MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \
153 _OCELOT_G_SERIAL_INIT(OCELOT_G_SERIAL1_IRQ, OCELOT_G_SERIAL1_BASE)
154#else
155#define MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS
156#endif
157
158#ifdef CONFIG_MOMENCO_OCELOT_C 118#ifdef CONFIG_MOMENCO_OCELOT_C
159/* Ordinary NS16552 duart with a 20MHz crystal. */ 119/* Ordinary NS16552 duart with a 20MHz crystal. */
160#define OCELOT_C_BASE_BAUD ( 20000000 / 16 ) 120#define OCELOT_C_BASE_BAUD ( 20000000 / 16 )
@@ -210,7 +170,6 @@
210 IP32_SERIAL_PORT_DEFNS \ 170 IP32_SERIAL_PORT_DEFNS \
211 JAZZ_SERIAL_PORT_DEFNS \ 171 JAZZ_SERIAL_PORT_DEFNS \
212 STD_SERIAL_PORT_DEFNS \ 172 STD_SERIAL_PORT_DEFNS \
213 MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \
214 MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \ 173 MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \
215 MOMENCO_OCELOT_SERIAL_PORT_DEFNS \ 174 MOMENCO_OCELOT_SERIAL_PORT_DEFNS \
216 MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS 175 MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index 3713d256d369..bb0b289dbc9e 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -464,7 +464,10 @@ static inline unsigned long __cmpxchg_local(volatile void * ptr,
464 464
465extern void set_handler (unsigned long offset, void *addr, unsigned long len); 465extern void set_handler (unsigned long offset, void *addr, unsigned long len);
466extern void set_uncached_handler (unsigned long offset, void *addr, unsigned long len); 466extern void set_uncached_handler (unsigned long offset, void *addr, unsigned long len);
467extern void *set_vi_handler (int n, void *addr); 467
468typedef void (*vi_handler_t)(void);
469extern void *set_vi_handler (int n, vi_handler_t addr);
470
468extern void *set_except_vector(int n, void *addr); 471extern void *set_except_vector(int n, void *addr);
469extern unsigned long ebase; 472extern unsigned long ebase;
470extern void per_cpu_trap_init(void); 473extern void per_cpu_trap_init(void);