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authorRalf Baechle <ralf@linux-mips.org>2007-07-09 11:29:16 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-07-10 12:33:05 -0400
commit688b3d720820a9e3e2e9d5882be64a28f649e206 (patch)
tree7181045ae55f69966e8237439a215242e9714ff4 /include/asm-mips
parentc99cabf034d42c9e4a9c1ed9dfd26411b2fb9b57 (diff)
[MIPS] Delete Ocelot 3 support.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips')
-rw-r--r--include/asm-mips/mach-ocelot3/cpu-feature-overrides.h48
-rw-r--r--include/asm-mips/war.h4
2 files changed, 2 insertions, 50 deletions
diff --git a/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h b/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h
deleted file mode 100644
index 57a12ded0613..000000000000
--- a/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2004 MontaVista Software Inc.
7 * Author: Manish Lachwani, mlachwani@mvista.com
8 * Copyright (C) 2004 Ralf Baechle
9 */
10#ifndef __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H
11#define __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H
12
13/*
14 * Momentum Ocelot-3 is based on Rm7900 processor which
15 * is based on the E9000 core.
16 */
17#define cpu_has_watch 1
18#define cpu_has_mips16 0
19#define cpu_has_divec 0
20#define cpu_has_vce 0
21#define cpu_has_cache_cdex_p 0
22#define cpu_has_cache_cdex_s 0
23#define cpu_has_prefetch 1
24#define cpu_has_mcheck 0
25#define cpu_has_ejtag 0
26
27#define cpu_has_llsc 1
28#define cpu_has_vtag_icache 0
29#define cpu_has_dc_aliases 0
30#define cpu_has_ic_fills_f_dc 0
31#define cpu_has_dsp 0
32#define cpu_icache_snoops_remote_store 0
33
34#define cpu_has_nofpuex 0
35#define cpu_has_64bits 1
36
37#define cpu_has_inclusive_pcaches 0
38
39#define cpu_dcache_line_size() 32
40#define cpu_icache_line_size() 32
41#define cpu_scache_line_size() 32
42
43#define cpu_has_mips32r1 0
44#define cpu_has_mips32r2 0
45#define cpu_has_mips64r1 0
46#define cpu_has_mips64r2 0
47
48#endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/war.h b/include/asm-mips/war.h
index 45cb82724830..9de52a5b0f3d 100644
--- a/include/asm-mips/war.h
+++ b/include/asm-mips/war.h
@@ -183,8 +183,8 @@
183 */ 183 */
184#if defined(CONFIG_BASLER_EXCITE) || defined(CONFIG_MIPS_ATLAS) || \ 184#if defined(CONFIG_BASLER_EXCITE) || defined(CONFIG_MIPS_ATLAS) || \
185 defined(CONFIG_MIPS_MALTA) || defined(CONFIG_MOMENCO_OCELOT) || \ 185 defined(CONFIG_MIPS_MALTA) || defined(CONFIG_MOMENCO_OCELOT) || \
186 defined(CONFIG_MOMENCO_OCELOT_3) || defined(CONFIG_PMC_YOSEMITE) || \ 186 defined(CONFIG_PMC_YOSEMITE) || defined(CONFIG_SGI_IP32) || \
187 defined(CONFIG_SGI_IP32) || defined(CONFIG_WR_PPMC) 187 defined(CONFIG_WR_PPMC)
188#define ICACHE_REFILLS_WORKAROUND_WAR 1 188#define ICACHE_REFILLS_WORKAROUND_WAR 1
189#endif 189#endif
190 190