diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2006-03-26 15:25:57 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-03-26 15:25:57 -0500 |
commit | 335bd9dff31d042b773591933d3ee5bd62d5ea27 (patch) | |
tree | d90228d7e8853bbc0a32f45352eb34602da943af /include/asm-mips | |
parent | 8faaea3faa5ed0b2a15afb7b4e57ce0cd8dbe4ef (diff) |
[SERIAL] Remove obsoleted au1x00_uart driver
As announced in feature-removal-schedule.txt.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-mips')
-rw-r--r-- | include/asm-mips/serial.h | 85 |
1 files changed, 1 insertions, 84 deletions
diff --git a/include/asm-mips/serial.h b/include/asm-mips/serial.h index e796d75f027e..7b2366412203 100644 --- a/include/asm-mips/serial.h +++ b/include/asm-mips/serial.h | |||
@@ -103,88 +103,6 @@ | |||
103 | #define IVR_SERIAL_PORT_DEFNS | 103 | #define IVR_SERIAL_PORT_DEFNS |
104 | #endif | 104 | #endif |
105 | 105 | ||
106 | #ifdef CONFIG_SERIAL_AU1X00 | ||
107 | #include <asm/mach-au1x00/au1000.h> | ||
108 | #ifdef CONFIG_SOC_AU1000 | ||
109 | #define AU1000_SERIAL_PORT_DEFNS \ | ||
110 | { .baud_base = 0, .port = UART0_ADDR, \ | ||
111 | .iomem_base = (unsigned char *)UART0_ADDR, \ | ||
112 | .irq = AU1000_UART0_INT, .flags = STD_COM_FLAGS, \ | ||
113 | .iomem_reg_shift = 2 }, \ | ||
114 | { .baud_base = 0, .port = UART1_ADDR, \ | ||
115 | .iomem_base = (unsigned char *)UART1_ADDR, \ | ||
116 | .irq = AU1000_UART1_INT, .flags = STD_COM_FLAGS, \ | ||
117 | .iomem_reg_shift = 2 }, \ | ||
118 | { .baud_base = 0, .port = UART2_ADDR, \ | ||
119 | .iomem_base = (unsigned char *)UART2_ADDR, \ | ||
120 | .irq = AU1000_UART2_INT, .flags = STD_COM_FLAGS, \ | ||
121 | .iomem_reg_shift = 2 }, \ | ||
122 | { .baud_base = 0, .port = UART3_ADDR, \ | ||
123 | .iomem_base = (unsigned char *)UART3_ADDR, \ | ||
124 | .irq = AU1000_UART3_INT, .flags = STD_COM_FLAGS, \ | ||
125 | .iomem_reg_shift = 2 }, | ||
126 | #endif | ||
127 | |||
128 | #ifdef CONFIG_SOC_AU1500 | ||
129 | #define AU1000_SERIAL_PORT_DEFNS \ | ||
130 | { .baud_base = 0, .port = UART0_ADDR, \ | ||
131 | .iomem_base = (unsigned char *)UART0_ADDR, \ | ||
132 | .irq = AU1500_UART0_INT, .flags = STD_COM_FLAGS, \ | ||
133 | .iomem_reg_shift = 2 }, \ | ||
134 | { .baud_base = 0, .port = UART3_ADDR, \ | ||
135 | .iomem_base = (unsigned char *)UART3_ADDR, \ | ||
136 | .irq = AU1500_UART3_INT, .flags = STD_COM_FLAGS, \ | ||
137 | .iomem_reg_shift = 2 }, | ||
138 | #endif | ||
139 | |||
140 | #ifdef CONFIG_SOC_AU1100 | ||
141 | #define AU1000_SERIAL_PORT_DEFNS \ | ||
142 | { .baud_base = 0, .port = UART0_ADDR, \ | ||
143 | .iomem_base = (unsigned char *)UART0_ADDR, \ | ||
144 | .irq = AU1100_UART0_INT, .flags = STD_COM_FLAGS, \ | ||
145 | .iomem_reg_shift = 2 }, \ | ||
146 | { .baud_base = 0, .port = UART1_ADDR, \ | ||
147 | .iomem_base = (unsigned char *)UART1_ADDR, \ | ||
148 | .irq = AU1100_UART1_INT, .flags = STD_COM_FLAGS, \ | ||
149 | .iomem_reg_shift = 2 }, \ | ||
150 | { .baud_base = 0, .port = UART3_ADDR, \ | ||
151 | .iomem_base = (unsigned char *)UART3_ADDR, \ | ||
152 | .irq = AU1100_UART3_INT, .flags = STD_COM_FLAGS, \ | ||
153 | .iomem_reg_shift = 2 }, | ||
154 | #endif | ||
155 | |||
156 | #ifdef CONFIG_SOC_AU1550 | ||
157 | #define AU1000_SERIAL_PORT_DEFNS \ | ||
158 | { .baud_base = 0, .port = UART0_ADDR, \ | ||
159 | .iomem_base = (unsigned char *)UART0_ADDR, \ | ||
160 | .irq = AU1550_UART0_INT, .flags = STD_COM_FLAGS, \ | ||
161 | .iomem_reg_shift = 2 }, \ | ||
162 | { .baud_base = 0, .port = UART1_ADDR, \ | ||
163 | .iomem_base = (unsigned char *)UART1_ADDR, \ | ||
164 | .irq = AU1550_UART1_INT, .flags = STD_COM_FLAGS, \ | ||
165 | .iomem_reg_shift = 2 }, \ | ||
166 | { .baud_base = 0, .port = UART3_ADDR, \ | ||
167 | .iomem_base = (unsigned char *)UART3_ADDR, \ | ||
168 | .irq = AU1550_UART3_INT, .flags = STD_COM_FLAGS,\ | ||
169 | .iomem_reg_shift = 2 }, | ||
170 | #endif | ||
171 | |||
172 | #ifdef CONFIG_SOC_AU1200 | ||
173 | #define AU1000_SERIAL_PORT_DEFNS \ | ||
174 | { .baud_base = 0, .port = UART0_ADDR, \ | ||
175 | .iomem_base = (unsigned char *)UART0_ADDR, \ | ||
176 | .irq = AU1200_UART0_INT, .flags = STD_COM_FLAGS, \ | ||
177 | .iomem_reg_shift = 2 }, \ | ||
178 | { .baud_base = 0, .port = UART1_ADDR, \ | ||
179 | .iomem_base = (unsigned char *)UART1_ADDR, \ | ||
180 | .irq = AU1200_UART1_INT, .flags = STD_COM_FLAGS, \ | ||
181 | .iomem_reg_shift = 2 }, | ||
182 | #endif | ||
183 | |||
184 | #else | ||
185 | #define AU1000_SERIAL_PORT_DEFNS | ||
186 | #endif | ||
187 | |||
188 | #ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT | 106 | #ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT |
189 | #define STD_SERIAL_PORT_DEFNS \ | 107 | #define STD_SERIAL_PORT_DEFNS \ |
190 | /* UART CLK PORT IRQ FLAGS */ \ | 108 | /* UART CLK PORT IRQ FLAGS */ \ |
@@ -331,7 +249,6 @@ | |||
331 | MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \ | 249 | MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \ |
332 | MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \ | 250 | MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \ |
333 | MOMENCO_OCELOT_SERIAL_PORT_DEFNS \ | 251 | MOMENCO_OCELOT_SERIAL_PORT_DEFNS \ |
334 | MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \ | 252 | MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS |
335 | AU1000_SERIAL_PORT_DEFNS | ||
336 | 253 | ||
337 | #endif /* _ASM_SERIAL_H */ | 254 | #endif /* _ASM_SERIAL_H */ |