aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-mips
diff options
context:
space:
mode:
authorRalf Baechle <ralf@linux-mips.org>2006-04-05 04:45:47 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-04-18 22:14:28 -0400
commitf088fc84f94c1a36943e28ad704a9a740a35f877 (patch)
tree309add2d3fe666920a681985c36d55f731df9922 /include/asm-mips
parent41c594ab65fc89573af296d192aa5235d09717ab (diff)
[MIPS] FPU affinity for MT ASE.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips')
-rw-r--r--include/asm-mips/cpu-features.h2
-rw-r--r--include/asm-mips/fpu.h4
-rw-r--r--include/asm-mips/processor.h16
-rw-r--r--include/asm-mips/system.h32
4 files changed, 53 insertions, 1 deletions
diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h
index 3f2b6d9ac45e..254e11ed247b 100644
--- a/include/asm-mips/cpu-features.h
+++ b/include/asm-mips/cpu-features.h
@@ -40,7 +40,7 @@
40#define cpu_has_sb1_cache (cpu_data[0].options & MIPS_CPU_SB1_CACHE) 40#define cpu_has_sb1_cache (cpu_data[0].options & MIPS_CPU_SB1_CACHE)
41#endif 41#endif
42#ifndef cpu_has_fpu 42#ifndef cpu_has_fpu
43#define cpu_has_fpu (cpu_data[0].options & MIPS_CPU_FPU) 43#define cpu_has_fpu (current_cpu_data.options & MIPS_CPU_FPU)
44#endif 44#endif
45#ifndef cpu_has_32fpr 45#ifndef cpu_has_32fpr
46#define cpu_has_32fpr (cpu_data[0].options & MIPS_CPU_32FPR) 46#define cpu_has_32fpr (cpu_data[0].options & MIPS_CPU_32FPR)
diff --git a/include/asm-mips/fpu.h b/include/asm-mips/fpu.h
index 9c828b1f8218..b0f50015e252 100644
--- a/include/asm-mips/fpu.h
+++ b/include/asm-mips/fpu.h
@@ -21,6 +21,10 @@
21#include <asm/processor.h> 21#include <asm/processor.h>
22#include <asm/current.h> 22#include <asm/current.h>
23 23
24#ifdef CONFIG_MIPS_MT_FPAFF
25#include <asm/mips_mt.h>
26#endif
27
24struct sigcontext; 28struct sigcontext;
25struct sigcontext32; 29struct sigcontext32;
26 30
diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h
index 786651340de1..0fb75f0762e0 100644
--- a/include/asm-mips/processor.h
+++ b/include/asm-mips/processor.h
@@ -134,6 +134,12 @@ struct thread_struct {
134 134
135 /* Saved fpu/fpu emulator stuff. */ 135 /* Saved fpu/fpu emulator stuff. */
136 union mips_fpu_union fpu; 136 union mips_fpu_union fpu;
137#ifdef CONFIG_MIPS_MT_FPAFF
138 /* Emulated instruction count */
139 unsigned long emulated_fp;
140 /* Saved per-thread scheduler affinity mask */
141 cpumask_t user_cpus_allowed;
142#endif /* CONFIG_MIPS_MT_FPAFF */
137 143
138 /* Saved state of the DSP ASE, if available. */ 144 /* Saved state of the DSP ASE, if available. */
139 struct mips_dsp_state dsp; 145 struct mips_dsp_state dsp;
@@ -159,6 +165,12 @@ struct thread_struct {
159#define MF_N32 MF_32BIT_ADDR 165#define MF_N32 MF_32BIT_ADDR
160#define MF_N64 0 166#define MF_N64 0
161 167
168#ifdef CONFIG_MIPS_MT_FPAFF
169#define FPAFF_INIT 0, INIT_CPUMASK,
170#else
171#define FPAFF_INIT
172#endif /* CONFIG_MIPS_MT_FPAFF */
173
162#define INIT_THREAD { \ 174#define INIT_THREAD { \
163 /* \ 175 /* \
164 * saved main processor registers \ 176 * saved main processor registers \
@@ -174,6 +186,10 @@ struct thread_struct {
174 */ \ 186 */ \
175 INIT_FPU, \ 187 INIT_FPU, \
176 /* \ 188 /* \
189 * fpu affinity state (null if not FPAFF) \
190 */ \
191 FPAFF_INIT \
192 /* \
177 * saved dsp/dsp emulator stuff \ 193 * saved dsp/dsp emulator stuff \
178 */ \ 194 */ \
179 INIT_DSP, \ 195 INIT_DSP, \
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index 39026690d9e4..261f71d16a07 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -155,6 +155,37 @@ extern asmlinkage void *resume(void *last, void *next, void *next_ti);
155 155
156struct task_struct; 156struct task_struct;
157 157
158#ifdef CONFIG_MIPS_MT_FPAFF
159
160/*
161 * Handle the scheduler resume end of FPU affinity management. We do this
162 * inline to try to keep the overhead down. If we have been forced to run on
163 * a "CPU" with an FPU because of a previous high level of FP computation,
164 * but did not actually use the FPU during the most recent time-slice (CU1
165 * isn't set), we undo the restriction on cpus_allowed.
166 *
167 * We're not calling set_cpus_allowed() here, because we have no need to
168 * force prompt migration - we're already switching the current CPU to a
169 * different thread.
170 */
171
172#define switch_to(prev,next,last) \
173do { \
174 if (cpu_has_fpu && \
175 (prev->thread.mflags & MF_FPUBOUND) && \
176 (!(KSTK_STATUS(prev) & ST0_CU1))) { \
177 prev->thread.mflags &= ~MF_FPUBOUND; \
178 prev->cpus_allowed = prev->thread.user_cpus_allowed; \
179 } \
180 if (cpu_has_dsp) \
181 __save_dsp(prev); \
182 next->thread.emulated_fp = 0; \
183 (last) = resume(prev, next, next->thread_info); \
184 if (cpu_has_dsp) \
185 __restore_dsp(current); \
186} while(0)
187
188#else
158#define switch_to(prev,next,last) \ 189#define switch_to(prev,next,last) \
159do { \ 190do { \
160 if (cpu_has_dsp) \ 191 if (cpu_has_dsp) \
@@ -163,6 +194,7 @@ do { \
163 if (cpu_has_dsp) \ 194 if (cpu_has_dsp) \
164 __restore_dsp(current); \ 195 __restore_dsp(current); \
165} while(0) 196} while(0)
197#endif
166 198
167/* 199/*
168 * On SMP systems, when the scheduler does migration-cost autodetection, 200 * On SMP systems, when the scheduler does migration-cost autodetection,