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authorRalf Baechle <ralf@linux-mips.org>2005-12-05 08:39:25 -0500
committer <ralf@denk.linux-mips.net>2006-01-10 08:39:04 -0500
commitda2c9ed55b0c7e8107f23530bde293239a0b5091 (patch)
tree6faca8c557afce21b5500f818cfe4fbf2a8871ce /include/asm-mips
parent977127174a7dff52d17faeeb4c4949a54221881f (diff)
MIPS: DSP: Context switch the DSPcontrol register also.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips')
-rw-r--r--include/asm-mips/dsp.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-mips/dsp.h b/include/asm-mips/dsp.h
index 50f556bb4978..2fb8aa35fbe5 100644
--- a/include/asm-mips/dsp.h
+++ b/include/asm-mips/dsp.h
@@ -48,6 +48,7 @@ do { \
48 tsk->thread.dsp.dspr[3] = mflo2(); \ 48 tsk->thread.dsp.dspr[3] = mflo2(); \
49 tsk->thread.dsp.dspr[4] = mfhi3(); \ 49 tsk->thread.dsp.dspr[4] = mfhi3(); \
50 tsk->thread.dsp.dspr[5] = mflo3(); \ 50 tsk->thread.dsp.dspr[5] = mflo3(); \
51 tsk->thread.dsp.dspcontrol = rddsp(0x2ff); \
51} while (0) 52} while (0)
52 53
53#define save_dsp(tsk) \ 54#define save_dsp(tsk) \
@@ -64,6 +65,7 @@ do { \
64 mtlo2(tsk->thread.dsp.dspr[3]); \ 65 mtlo2(tsk->thread.dsp.dspr[3]); \
65 mthi3(tsk->thread.dsp.dspr[4]); \ 66 mthi3(tsk->thread.dsp.dspr[4]); \
66 mtlo3(tsk->thread.dsp.dspr[5]); \ 67 mtlo3(tsk->thread.dsp.dspr[5]); \
68 wrdsp(tsk->thread.dsp.dspcontrol, 0x2ff); \
67} while (0) 69} while (0)
68 70
69#define restore_dsp(tsk) \ 71#define restore_dsp(tsk) \