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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2006-10-25 10:57:04 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-11-29 20:14:49 -0500
commit187933f23679c413706030aefad9e85e79164c44 (patch)
tree8efd558a3cb30a337f16869241a4075831587b3a /include/asm-mips
parent617667ba724d46ffeccb88ee99e1379f29b0bfa7 (diff)
[MIPS] do_IRQ cleanup
Now we have both function and macro version of do_IRQ() and the former is used only by DEC and non-preemptive kernel. This patch makes everyone use the macro version and removes the function version. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips')
-rw-r--r--include/asm-mips/irq.h6
1 files changed, 0 insertions, 6 deletions
diff --git a/include/asm-mips/irq.h b/include/asm-mips/irq.h
index aed370770225..67657089efa7 100644
--- a/include/asm-mips/irq.h
+++ b/include/asm-mips/irq.h
@@ -24,8 +24,6 @@ static inline int irq_canonicalize(int irq)
24#define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */ 24#define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */
25#endif 25#endif
26 26
27extern asmlinkage unsigned int do_IRQ(unsigned int irq);
28
29#ifdef CONFIG_MIPS_MT_SMTC 27#ifdef CONFIG_MIPS_MT_SMTC
30/* 28/*
31 * Clear interrupt mask handling "backstop" if irq_hwmask 29 * Clear interrupt mask handling "backstop" if irq_hwmask
@@ -43,8 +41,6 @@ do { \
43#define __DO_IRQ_SMTC_HOOK() do { } while (0) 41#define __DO_IRQ_SMTC_HOOK() do { } while (0)
44#endif 42#endif
45 43
46#ifdef CONFIG_PREEMPT
47
48/* 44/*
49 * do_IRQ handles all normal device IRQ's (the special 45 * do_IRQ handles all normal device IRQ's (the special
50 * SMP cross-CPU interrupts have their own specific 46 * SMP cross-CPU interrupts have their own specific
@@ -61,8 +57,6 @@ do { \
61 irq_exit(); \ 57 irq_exit(); \
62} while (0) 58} while (0)
63 59
64#endif
65
66extern void arch_init_irq(void); 60extern void arch_init_irq(void);
67extern void spurious_interrupt(void); 61extern void spurious_interrupt(void);
68 62