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authorRalf Baechle <ralf@linux-mips.org>2007-07-25 11:19:33 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-07-31 16:35:21 -0400
commit293c5bd13f124c325f74f89ad26edf5612ce7235 (patch)
tree6de7ce919a10c58e29093776c02e61d7127ed12b /include/asm-mips
parent01754bbc692929e446e600f69b41013e554399a6 (diff)
[MIPS] Fixup secure computing stuff.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips')
-rw-r--r--include/asm-mips/a.out.h3
-rw-r--r--include/asm-mips/elf.h13
-rw-r--r--include/asm-mips/processor.h20
-rw-r--r--include/asm-mips/seccomp.h37
-rw-r--r--include/asm-mips/system.h8
-rw-r--r--include/asm-mips/thread_info.h12
6 files changed, 65 insertions, 28 deletions
diff --git a/include/asm-mips/a.out.h b/include/asm-mips/a.out.h
index 1ad60ba186d0..bf55a5b34bef 100644
--- a/include/asm-mips/a.out.h
+++ b/include/asm-mips/a.out.h
@@ -38,7 +38,8 @@ struct exec
38#define STACK_TOP TASK_SIZE 38#define STACK_TOP TASK_SIZE
39#endif 39#endif
40#ifdef CONFIG_64BIT 40#ifdef CONFIG_64BIT
41#define STACK_TOP (current->thread.mflags & MF_32BIT_ADDR ? TASK_SIZE32 : TASK_SIZE) 41#define STACK_TOP \
42 (test_thread_flag(TIF_32BIT_ADDR) ? TASK_SIZE32 : TASK_SIZE)
42#endif 43#endif
43#define STACK_TOP_MAX TASK_SIZE 44#define STACK_TOP_MAX TASK_SIZE
44 45
diff --git a/include/asm-mips/elf.h b/include/asm-mips/elf.h
index ebd6bfb19d66..e7d95d48177d 100644
--- a/include/asm-mips/elf.h
+++ b/include/asm-mips/elf.h
@@ -265,7 +265,7 @@ do { \
265#ifdef CONFIG_MIPS32_N32 265#ifdef CONFIG_MIPS32_N32
266#define __SET_PERSONALITY32_N32() \ 266#define __SET_PERSONALITY32_N32() \
267 do { \ 267 do { \
268 current->thread.mflags |= MF_N32; \ 268 set_thread_flag(TIF_32BIT_ADDR); \
269 current->thread.abi = &mips_abi_n32; \ 269 current->thread.abi = &mips_abi_n32; \
270 } while (0) 270 } while (0)
271#else 271#else
@@ -276,7 +276,8 @@ do { \
276#ifdef CONFIG_MIPS32_O32 276#ifdef CONFIG_MIPS32_O32
277#define __SET_PERSONALITY32_O32() \ 277#define __SET_PERSONALITY32_O32() \
278 do { \ 278 do { \
279 current->thread.mflags |= MF_O32; \ 279 set_thread_flag(TIF_32BIT_REGS); \
280 set_thread_flag(TIF_32BIT_ADDR); \
280 current->thread.abi = &mips_abi_32; \ 281 current->thread.abi = &mips_abi_32; \
281 } while (0) 282 } while (0)
282#else 283#else
@@ -299,13 +300,13 @@ do { \
299 300
300#define SET_PERSONALITY(ex, ibcs2) \ 301#define SET_PERSONALITY(ex, ibcs2) \
301do { \ 302do { \
302 current->thread.mflags &= ~MF_ABI_MASK; \ 303 clear_thread_flag(TIF_32BIT_REGS); \
304 clear_thread_flag(TIF_32BIT_ADDR); \
305 \
303 if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ 306 if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
304 __SET_PERSONALITY32(ex); \ 307 __SET_PERSONALITY32(ex); \
305 else { \ 308 else \
306 current->thread.mflags |= MF_N64; \
307 current->thread.abi = &mips_abi; \ 309 current->thread.abi = &mips_abi; \
308 } \
309 \ 310 \
310 if (ibcs2) \ 311 if (ibcs2) \
311 set_personality(PER_SVR4); \ 312 set_personality(PER_SVR4); \
diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h
index 1d8b9a8ae324..83bc94534084 100644
--- a/include/asm-mips/processor.h
+++ b/include/asm-mips/processor.h
@@ -62,8 +62,9 @@ extern unsigned int vced_count, vcei_count;
62 * This decides where the kernel will search for a free chunk of vm 62 * This decides where the kernel will search for a free chunk of vm
63 * space during mmap's. 63 * space during mmap's.
64 */ 64 */
65#define TASK_UNMAPPED_BASE ((current->thread.mflags & MF_32BIT_ADDR) ? \ 65#define TASK_UNMAPPED_BASE \
66 PAGE_ALIGN(TASK_SIZE32 / 3) : PAGE_ALIGN(TASK_SIZE / 3)) 66 (test_thread_flag(TIF_32BIT_ADDR) ? \
67 PAGE_ALIGN(TASK_SIZE32 / 3) : PAGE_ALIGN(TASK_SIZE / 3))
67#endif 68#endif
68 69
69#define NUM_FPU_REGS 32 70#define NUM_FPU_REGS 32
@@ -132,22 +133,11 @@ struct thread_struct {
132 unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */ 133 unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */
133 unsigned long error_code; 134 unsigned long error_code;
134 unsigned long trap_no; 135 unsigned long trap_no;
135#define MF_FIXADE 1 /* Fix address errors in software */
136#define MF_LOGADE 2 /* Log address errors to syslog */
137#define MF_32BIT_REGS 4 /* also implies 16/32 fprs */
138#define MF_32BIT_ADDR 8 /* 32-bit address space (o32/n32) */
139#define MF_FPUBOUND 0x10 /* thread bound to FPU-full CPU set */
140 unsigned long mflags;
141 unsigned long irix_trampoline; /* Wheee... */ 136 unsigned long irix_trampoline; /* Wheee... */
142 unsigned long irix_oldctx; 137 unsigned long irix_oldctx;
143 struct mips_abi *abi; 138 struct mips_abi *abi;
144}; 139};
145 140
146#define MF_ABI_MASK (MF_32BIT_REGS | MF_32BIT_ADDR)
147#define MF_O32 (MF_32BIT_REGS | MF_32BIT_ADDR)
148#define MF_N32 MF_32BIT_ADDR
149#define MF_N64 0
150
151#ifdef CONFIG_MIPS_MT_FPAFF 141#ifdef CONFIG_MIPS_MT_FPAFF
152#define FPAFF_INIT \ 142#define FPAFF_INIT \
153 .emulated_fp = 0, \ 143 .emulated_fp = 0, \
@@ -200,10 +190,6 @@ struct thread_struct {
200 .cp0_baduaddr = 0, \ 190 .cp0_baduaddr = 0, \
201 .error_code = 0, \ 191 .error_code = 0, \
202 .trap_no = 0, \ 192 .trap_no = 0, \
203 /* \
204 * For now the default is to fix address errors \
205 */ \
206 .mflags = MF_FIXADE, \
207 .irix_trampoline = 0, \ 193 .irix_trampoline = 0, \
208 .irix_oldctx = 0, \ 194 .irix_oldctx = 0, \
209} 195}
diff --git a/include/asm-mips/seccomp.h b/include/asm-mips/seccomp.h
new file mode 100644
index 000000000000..36ed44070256
--- /dev/null
+++ b/include/asm-mips/seccomp.h
@@ -0,0 +1,37 @@
1#ifndef __ASM_SECCOMP_H
2
3#include <linux/thread_info.h>
4#include <linux/unistd.h>
5
6#define __NR_seccomp_read __NR_read
7#define __NR_seccomp_write __NR_write
8#define __NR_seccomp_exit __NR_exit
9#define __NR_seccomp_sigreturn __NR_rt_sigreturn
10
11/*
12 * Kludge alert:
13 *
14 * The generic seccomp code currently allows only a single compat ABI. Until
15 * this is fixed we priorize O32 as the compat ABI over N32.
16 */
17#ifdef CONFIG_MIPS32_O32
18
19#define TIF_32BIT TIF_32BIT_REGS
20
21#define __NR_seccomp_read_32 4003
22#define __NR_seccomp_write_32 4004
23#define __NR_seccomp_exit_32 4001
24#define __NR_seccomp_sigreturn_32 4193 /* rt_sigreturn */
25
26#elif defined(CONFIG_MIPS32_N32)
27
28#define TIF_32BIT _TIF_32BIT_ADDR
29
30#define __NR_seccomp_read_32 6000
31#define __NR_seccomp_write_32 6001
32#define __NR_seccomp_exit_32 6058
33#define __NR_seccomp_sigreturn_32 6211 /* rt_sigreturn */
34
35#endif /* CONFIG_MIPS32_O32 */
36
37#endif /* __ASM_SECCOMP_H */
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index 8d0b1cd4a45e..357251f42518 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -46,10 +46,12 @@ struct task_struct;
46 46
47#define __mips_mt_fpaff_switch_to(prev) \ 47#define __mips_mt_fpaff_switch_to(prev) \
48do { \ 48do { \
49 struct thread_info *__prev_ti = task_thread_info(prev); \
50 \
49 if (cpu_has_fpu && \ 51 if (cpu_has_fpu && \
50 (prev->thread.mflags & MF_FPUBOUND) && \ 52 test_ti_thread_flag(__prev_ti, TIF_FPUBOUND) && \
51 (!(KSTK_STATUS(prev) & ST0_CU1))) { \ 53 (!(KSTK_STATUS(prev) & ST0_CU1))) { \
52 prev->thread.mflags &= ~MF_FPUBOUND; \ 54 clear_ti_thread_flag(__prev_ti, TIF_FPUBOUND); \
53 prev->cpus_allowed = prev->thread.user_cpus_allowed; \ 55 prev->cpus_allowed = prev->thread.user_cpus_allowed; \
54 } \ 56 } \
55 next->thread.emulated_fp = 0; \ 57 next->thread.emulated_fp = 0; \
diff --git a/include/asm-mips/thread_info.h b/include/asm-mips/thread_info.h
index fbcda8204473..9676e7d9f52d 100644
--- a/include/asm-mips/thread_info.h
+++ b/include/asm-mips/thread_info.h
@@ -46,7 +46,7 @@ struct thread_info {
46{ \ 46{ \
47 .task = &tsk, \ 47 .task = &tsk, \
48 .exec_domain = &default_exec_domain, \ 48 .exec_domain = &default_exec_domain, \
49 .flags = 0, \ 49 .flags = _TIF_FIXADE, \
50 .cpu = 0, \ 50 .cpu = 0, \
51 .preempt_count = 1, \ 51 .preempt_count = 1, \
52 .addr_limit = KERNEL_DS, \ 52 .addr_limit = KERNEL_DS, \
@@ -119,6 +119,11 @@ register struct thread_info *__current_thread_info __asm__("$28");
119#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */ 119#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */
120#define TIF_MEMDIE 18 120#define TIF_MEMDIE 18
121#define TIF_FREEZE 19 121#define TIF_FREEZE 19
122#define TIF_FIXADE 20 /* Fix address errors in software */
123#define TIF_LOGADE 21 /* Log address errors to syslog */
124#define TIF_32BIT_REGS 22 /* also implies 16/32 fprs */
125#define TIF_32BIT_ADDR 23 /* 32-bit address space (o32/n32) */
126#define TIF_FPUBOUND 24 /* thread bound to FPU-full CPU set */
122#define TIF_SYSCALL_TRACE 31 /* syscall trace active */ 127#define TIF_SYSCALL_TRACE 31 /* syscall trace active */
123 128
124#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) 129#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
@@ -131,6 +136,11 @@ register struct thread_info *__current_thread_info __asm__("$28");
131#define _TIF_USEDFPU (1<<TIF_USEDFPU) 136#define _TIF_USEDFPU (1<<TIF_USEDFPU)
132#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 137#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
133#define _TIF_FREEZE (1<<TIF_FREEZE) 138#define _TIF_FREEZE (1<<TIF_FREEZE)
139#define _TIF_FIXADE (1<<TIF_FIXADE)
140#define _TIF_LOGADE (1<<TIF_LOGADE)
141#define _TIF_32BIT_REGS (1<<TIF_32BIT_REGS)
142#define _TIF_32BIT_ADDR (1<<TIF_32BIT_ADDR)
143#define _TIF_FPUBOUND (1<<TIF_FPUBOUND)
134 144
135/* work to do on interrupt/exception return */ 145/* work to do on interrupt/exception return */
136#define _TIF_WORK_MASK (0x0000ffef & ~_TIF_SECCOMP) 146#define _TIF_WORK_MASK (0x0000ffef & ~_TIF_SECCOMP)