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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2008-07-18 12:51:52 -0400
committerRalf Baechle <ralf@linux-mips.org>2008-07-20 09:38:21 -0400
commite0eb730757665d7e8ec0e79d9042a9311f3edb7e (patch)
tree21efae4299822041f1736abcf13dfe7e1ed349fc /include/asm-mips
parent94a4c32939dede9328c6e4face335eb8441fc18d (diff)
[MIPS] TXx9: Fix some sparse warnings
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips')
-rw-r--r--include/asm-mips/txx9/tx3927.h19
1 files changed, 10 insertions, 9 deletions
diff --git a/include/asm-mips/txx9/tx3927.h b/include/asm-mips/txx9/tx3927.h
index ca414c7624e1..ea79e1b16e71 100644
--- a/include/asm-mips/txx9/tx3927.h
+++ b/include/asm-mips/txx9/tx3927.h
@@ -10,17 +10,18 @@
10 10
11#include <asm/txx9/txx927.h> 11#include <asm/txx9/txx927.h>
12 12
13#define TX3927_SDRAMC_REG 0xfffe8000 13#define TX3927_REG_BASE 0xfffe0000UL
14#define TX3927_ROMC_REG 0xfffe9000 14#define TX3927_SDRAMC_REG (TX3927_REG_BASE + 0x8000)
15#define TX3927_DMA_REG 0xfffeb000 15#define TX3927_ROMC_REG (TX3927_REG_BASE + 0x9000)
16#define TX3927_IRC_REG 0xfffec000 16#define TX3927_DMA_REG (TX3927_REG_BASE + 0xb000)
17#define TX3927_PCIC_REG 0xfffed000 17#define TX3927_IRC_REG (TX3927_REG_BASE + 0xc000)
18#define TX3927_CCFG_REG 0xfffee000 18#define TX3927_PCIC_REG (TX3927_REG_BASE + 0xd000)
19#define TX3927_CCFG_REG (TX3927_REG_BASE + 0xe000)
19#define TX3927_NR_TMR 3 20#define TX3927_NR_TMR 3
20#define TX3927_TMR_REG(ch) (0xfffef000 + (ch) * 0x100) 21#define TX3927_TMR_REG(ch) (TX3927_REG_BASE + 0xf000 + (ch) * 0x100)
21#define TX3927_NR_SIO 2 22#define TX3927_NR_SIO 2
22#define TX3927_SIO_REG(ch) (0xfffef300 + (ch) * 0x100) 23#define TX3927_SIO_REG(ch) (TX3927_REG_BASE + 0xf300 + (ch) * 0x100)
23#define TX3927_PIO_REG 0xfffef500 24#define TX3927_PIO_REG (TX3927_REG_BASE + 0xf500)
24 25
25struct tx3927_sdramc_reg { 26struct tx3927_sdramc_reg {
26 volatile unsigned long cr[8]; 27 volatile unsigned long cr[8];