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authorChris Dearman <chris@mips.com>2008-05-16 20:29:54 -0400
committerRalf Baechle <ralf@linux-mips.org>2008-06-16 10:14:48 -0400
commitd6c3048cad3c9eb312c070e11fdbea56498255ed (patch)
treeaf00989a08efe98198594f9d44ee98a1c8f76a01 /include/asm-mips
parenta9ad02bdbb0193203a477bbd0e833adf9fb29ac4 (diff)
[MIPS] vpe_id is required for VSMP and SMTC builds
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips')
-rw-r--r--include/asm-mips/cpu-info.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/asm-mips/cpu-info.h b/include/asm-mips/cpu-info.h
index 0c5a358863f3..2de73dbb2e9e 100644
--- a/include/asm-mips/cpu-info.h
+++ b/include/asm-mips/cpu-info.h
@@ -56,7 +56,7 @@ struct cpuinfo_mips {
56 struct cache_desc tcache; /* Tertiary/split secondary cache */ 56 struct cache_desc tcache; /* Tertiary/split secondary cache */
57 int srsets; /* Shadow register sets */ 57 int srsets; /* Shadow register sets */
58 int core; /* physical core number */ 58 int core; /* physical core number */
59#if defined(CONFIG_MIPS_MT_SMTC) 59#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC)
60 /* 60 /*
61 * In the MIPS MT "SMTC" model, each TC is considered 61 * In the MIPS MT "SMTC" model, each TC is considered
62 * to be a "CPU" for the purposes of scheduling, but 62 * to be a "CPU" for the purposes of scheduling, but
@@ -64,7 +64,7 @@ struct cpuinfo_mips {
64 * to all TCs within the same VPE. 64 * to all TCs within the same VPE.
65 */ 65 */
66 int vpe_id; /* Virtual Processor number */ 66 int vpe_id; /* Virtual Processor number */
67#endif /* CONFIG_MIPS_MT */ 67#endif
68#ifdef CONFIG_MIPS_MT_SMTC 68#ifdef CONFIG_MIPS_MT_SMTC
69 int tc_id; /* Thread Context number */ 69 int tc_id; /* Thread Context number */
70#endif 70#endif