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authorMaciej W. Rozycki <macro@linux-mips.org>2007-07-17 07:03:50 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-17 13:23:03 -0400
commitb45d52797432bd6b5d9786dbda940eb8d0b9ed06 (patch)
tree1bc6d7961c37c5cab006976b90ab084a11f33457 /include/asm-mips
parentf9e86f419073605b4520848021cc042963c227c7 (diff)
sb1250-duart.c: SB1250 DUART serial support
This is a driver for the SB1250 DUART, a dual serial port implementation included in the Broadcom family of SOCs descending from the SiByte SB1250 MIPS64 chip multiprocessor. It is a new implementation replacing the old-fashioned driver currently present in the linux-mips.org tree. It supports all the usual features one would expect from a(n asynchronous) serial driver, including modem line control (as far as hardware supports it -- there is edge detection logic missing from the DCD and RI lines and the driver does not implement polling of these lines at the moment), the serial console, BREAK transmission and reception, including the magic SysRq. The receive FIFO threshold is not maintained though. The driver was tested with a SWARM board which uses a BCM1250 SOC (which is dual MIPS64 CMP) and has both ports of the single DUART implemented wired externally. Both were tested. Testing included using the ports as terminal lines at 1200bps (which is the ports minimum), 115200bps and a couple of random speeds inbetween. The modem lines were verified to operate correctly. No testing was performed with a use as a network interface, like with SLIP or PPP. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Acked-by: Ralf Baechle <ralf@linux-mips.org> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include/asm-mips')
-rw-r--r--include/asm-mips/sibyte/bcm1480_regs.h30
-rw-r--r--include/asm-mips/sibyte/sb1250_regs.h76
-rw-r--r--include/asm-mips/sibyte/sb1250_uart.h7
3 files changed, 68 insertions, 45 deletions
diff --git a/include/asm-mips/sibyte/bcm1480_regs.h b/include/asm-mips/sibyte/bcm1480_regs.h
index bda391d3af85..2738c1366f66 100644
--- a/include/asm-mips/sibyte/bcm1480_regs.h
+++ b/include/asm-mips/sibyte/bcm1480_regs.h
@@ -220,17 +220,25 @@
220#define A_BCM1480_DUART(chan) ((((chan)&2) == 0)? A_BCM1480_DUART0 : A_BCM1480_DUART1) 220#define A_BCM1480_DUART(chan) ((((chan)&2) == 0)? A_BCM1480_DUART0 : A_BCM1480_DUART1)
221 221
222#define BCM1480_DUART_CHANREG_SPACING 0x100 222#define BCM1480_DUART_CHANREG_SPACING 0x100
223#define A_BCM1480_DUART_CHANREG(chan,reg) (A_BCM1480_DUART(chan) \ 223#define A_BCM1480_DUART_CHANREG(chan, reg) \
224 + BCM1480_DUART_CHANREG_SPACING*((chan)&1) \ 224 (A_BCM1480_DUART(chan) + \
225 + (reg)) 225 BCM1480_DUART_CHANREG_SPACING * (((chan) & 1) + 1) + (reg))
226#define R_BCM1480_DUART_CHANREG(chan,reg) (BCM1480_DUART_CHANREG_SPACING*((chan)&1) + (reg)) 226#define A_BCM1480_DUART_CTRLREG(chan, reg) \
227 227 (A_BCM1480_DUART(chan) + \
228#define R_BCM1480_DUART_IMRREG(chan) (R_DUART_IMR_A + ((chan)&1)*DUART_IMRISR_SPACING) 228 BCM1480_DUART_CHANREG_SPACING * 3 + (reg))
229#define R_BCM1480_DUART_ISRREG(chan) (R_DUART_ISR_A + ((chan)&1)*DUART_IMRISR_SPACING) 229
230 230#define R_BCM1480_DUART_IMRREG(chan) \
231#define A_BCM1480_DUART_IMRREG(chan) (A_BCM1480_DUART(chan) + R_BCM1480_DUART_IMRREG(chan)) 231 (R_DUART_IMR_A + ((chan) & 1) * DUART_IMRISR_SPACING)
232#define A_BCM1480_DUART_ISRREG(chan) (A_BCM1480_DUART(chan) + R_BCM1480_DUART_ISRREG(chan)) 232#define R_BCM1480_DUART_ISRREG(chan) \
233#define A_BCM1480_DUART_IN_PORT(chan) (A_BCM1480_DUART(chan) + R_DUART_INP_ORT) 233 (R_DUART_ISR_A + ((chan) & 1) * DUART_IMRISR_SPACING)
234
235#define A_BCM1480_DUART_IMRREG(chan) \
236 (A_BCM1480_DUART_CTRLREG((chan), R_BCM1480_DUART_IMRREG(chan)))
237#define A_BCM1480_DUART_ISRREG(chan) \
238 (A_BCM1480_DUART_CTRLREG((chan), R_BCM1480_DUART_ISRREG(chan)))
239
240#define A_BCM1480_DUART_IN_PORT(chan) \
241 (A_BCM1480_DUART_CTRLREG((chan), R_DUART_IN_PORT))
234 242
235/* 243/*
236 * These constants are the absolute addresses. 244 * These constants are the absolute addresses.
diff --git a/include/asm-mips/sibyte/sb1250_regs.h b/include/asm-mips/sibyte/sb1250_regs.h
index da7c188993c9..220b7e94f1bf 100644
--- a/include/asm-mips/sibyte/sb1250_regs.h
+++ b/include/asm-mips/sibyte/sb1250_regs.h
@@ -272,59 +272,69 @@
272 ********************************************************************* */ 272 ********************************************************************* */
273 273
274 274
275#if SIBYTE_HDR_FEATURE_1250_112x /* This MC only on 1250 & 112x */ 275#if SIBYTE_HDR_FEATURE_1250_112x /* This MC only on 1250 & 112x */
276#define R_DUART_NUM_PORTS 2 276#define R_DUART_NUM_PORTS 2
277 277
278#define A_DUART 0x0010060000 278#define A_DUART 0x0010060000
279 279
280#define DUART_CHANREG_SPACING 0x100 280#define DUART_CHANREG_SPACING 0x100
281#define A_DUART_CHANREG(chan,reg) (A_DUART + DUART_CHANREG_SPACING*(chan) + (reg)) 281
282#define R_DUART_CHANREG(chan,reg) (DUART_CHANREG_SPACING*(chan) + (reg)) 282#define A_DUART_CHANREG(chan, reg) \
283 (A_DUART + DUART_CHANREG_SPACING * ((chan) + 1) + (reg))
283#endif /* 1250 & 112x */ 284#endif /* 1250 & 112x */
284 285
285#define R_DUART_MODE_REG_1 0x100 286#define R_DUART_MODE_REG_1 0x000
286#define R_DUART_MODE_REG_2 0x110 287#define R_DUART_MODE_REG_2 0x010
287#define R_DUART_STATUS 0x120 288#define R_DUART_STATUS 0x020
288#define R_DUART_CLK_SEL 0x130 289#define R_DUART_CLK_SEL 0x030
289#define R_DUART_CMD 0x150 290#define R_DUART_CMD 0x050
290#define R_DUART_RX_HOLD 0x160 291#define R_DUART_RX_HOLD 0x060
291#define R_DUART_TX_HOLD 0x170 292#define R_DUART_TX_HOLD 0x070
292 293
293#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) 294#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
294#define R_DUART_FULL_CTL 0x140 295#define R_DUART_FULL_CTL 0x040
295#define R_DUART_OPCR_X 0x180 296#define R_DUART_OPCR_X 0x080
296#define R_DUART_AUXCTL_X 0x190 297#define R_DUART_AUXCTL_X 0x090
297#endif /* 1250 PASS2 || 112x PASS1 || 1480*/ 298#endif /* 1250 PASS2 || 112x PASS1 || 1480 */
298 299
299 300
300/* 301/*
301 * The IMR and ISR can't be addressed with A_DUART_CHANREG, 302 * The IMR and ISR can't be addressed with A_DUART_CHANREG,
302 * so use this macro instead. 303 * so use these macros instead.
303 */ 304 */
304 305
305#define R_DUART_AUX_CTRL 0x310 306#if SIBYTE_HDR_FEATURE_1250_112x /* This MC only on 1250 & 112x */
306#define R_DUART_ISR_A 0x320 307#define DUART_IMRISR_SPACING 0x20
307#define R_DUART_IMR_A 0x330 308#define DUART_INCHNG_SPACING 0x10
308#define R_DUART_ISR_B 0x340
309#define R_DUART_IMR_B 0x350
310#define R_DUART_OUT_PORT 0x360
311#define R_DUART_OPCR 0x370
312#define R_DUART_IN_PORT 0x380
313 309
314#define R_DUART_SET_OPR 0x3B0 310#define A_DUART_CTRLREG(reg) \
315#define R_DUART_CLEAR_OPR 0x3C0 311 (A_DUART + DUART_CHANREG_SPACING * 3 + (reg))
316 312
317#define DUART_IMRISR_SPACING 0x20 313#define R_DUART_IMRREG(chan) \
314 (R_DUART_IMR_A + (chan) * DUART_IMRISR_SPACING)
315#define R_DUART_ISRREG(chan) \
316 (R_DUART_ISR_A + (chan) * DUART_IMRISR_SPACING)
317#define R_DUART_INCHREG(chan) \
318 (R_DUART_IN_CHNG_A + (chan) * DUART_INCHNG_SPACING)
318 319
319#if SIBYTE_HDR_FEATURE_1250_112x /* This MC only on 1250 & 112x */ 320#define A_DUART_IMRREG(chan) A_DUART_CTRLREG(R_DUART_IMRREG(chan))
320#define R_DUART_IMRREG(chan) (R_DUART_IMR_A + (chan)*DUART_IMRISR_SPACING) 321#define A_DUART_ISRREG(chan) A_DUART_CTRLREG(R_DUART_ISRREG(chan))
321#define R_DUART_ISRREG(chan) (R_DUART_ISR_A + (chan)*DUART_IMRISR_SPACING) 322#define A_DUART_INCHREG(chan) A_DUART_CTRLREG(R_DUART_INCHREG(chan))
322
323#define A_DUART_IMRREG(chan) (A_DUART + R_DUART_IMRREG(chan))
324#define A_DUART_ISRREG(chan) (A_DUART + R_DUART_ISRREG(chan))
325#endif /* 1250 & 112x */ 323#endif /* 1250 & 112x */
326 324
327 325#define R_DUART_AUX_CTRL 0x010
326#define R_DUART_ISR_A 0x020
327#define R_DUART_IMR_A 0x030
328#define R_DUART_ISR_B 0x040
329#define R_DUART_IMR_B 0x050
330#define R_DUART_OUT_PORT 0x060
331#define R_DUART_OPCR 0x070
332#define R_DUART_IN_PORT 0x080
333
334#define R_DUART_SET_OPR 0x0B0
335#define R_DUART_CLEAR_OPR 0x0C0
336#define R_DUART_IN_CHNG_A 0x0D0
337#define R_DUART_IN_CHNG_B 0x0E0
328 338
329 339
330/* 340/*
diff --git a/include/asm-mips/sibyte/sb1250_uart.h b/include/asm-mips/sibyte/sb1250_uart.h
index e87045e62bf0..cf74fedcbef1 100644
--- a/include/asm-mips/sibyte/sb1250_uart.h
+++ b/include/asm-mips/sibyte/sb1250_uart.h
@@ -75,7 +75,8 @@
75#define V_DUART_PARITY_MODE_ADD_FIXED V_DUART_PARITY_MODE(K_DUART_PARITY_MODE_ADD_FIXED) 75#define V_DUART_PARITY_MODE_ADD_FIXED V_DUART_PARITY_MODE(K_DUART_PARITY_MODE_ADD_FIXED)
76#define V_DUART_PARITY_MODE_NONE V_DUART_PARITY_MODE(K_DUART_PARITY_MODE_NONE) 76#define V_DUART_PARITY_MODE_NONE V_DUART_PARITY_MODE(K_DUART_PARITY_MODE_NONE)
77 77
78#define M_DUART_ERR_MODE _SB_MAKEMASK1(5) /* must be zero */ 78#define M_DUART_TX_IRQ_SEL_TXRDY 0
79#define M_DUART_TX_IRQ_SEL_TXEMPT _SB_MAKEMASK1(5)
79 80
80#define M_DUART_RX_IRQ_SEL_RXRDY 0 81#define M_DUART_RX_IRQ_SEL_RXRDY 0
81#define M_DUART_RX_IRQ_SEL_RXFULL _SB_MAKEMASK1(6) 82#define M_DUART_RX_IRQ_SEL_RXFULL _SB_MAKEMASK1(6)
@@ -246,10 +247,13 @@
246 247
247#define M_DUART_ISR_BRK_A _SB_MAKEMASK1(2) 248#define M_DUART_ISR_BRK_A _SB_MAKEMASK1(2)
248#define M_DUART_ISR_IN_A _SB_MAKEMASK1(3) 249#define M_DUART_ISR_IN_A _SB_MAKEMASK1(3)
250#define M_DUART_ISR_ALL_A _SB_MAKEMASK(4,0)
251
249#define M_DUART_ISR_TX_B _SB_MAKEMASK1(4) 252#define M_DUART_ISR_TX_B _SB_MAKEMASK1(4)
250#define M_DUART_ISR_RX_B _SB_MAKEMASK1(5) 253#define M_DUART_ISR_RX_B _SB_MAKEMASK1(5)
251#define M_DUART_ISR_BRK_B _SB_MAKEMASK1(6) 254#define M_DUART_ISR_BRK_B _SB_MAKEMASK1(6)
252#define M_DUART_ISR_IN_B _SB_MAKEMASK1(7) 255#define M_DUART_ISR_IN_B _SB_MAKEMASK1(7)
256#define M_DUART_ISR_ALL_B _SB_MAKEMASK(4,4)
253 257
254/* 258/*
255 * DUART Channel A Interrupt Status Register (Table 10-17) 259 * DUART Channel A Interrupt Status Register (Table 10-17)
@@ -262,6 +266,7 @@
262#define M_DUART_ISR_RX _SB_MAKEMASK1(1) 266#define M_DUART_ISR_RX _SB_MAKEMASK1(1)
263#define M_DUART_ISR_BRK _SB_MAKEMASK1(2) 267#define M_DUART_ISR_BRK _SB_MAKEMASK1(2)
264#define M_DUART_ISR_IN _SB_MAKEMASK1(3) 268#define M_DUART_ISR_IN _SB_MAKEMASK1(3)
269#define M_DUART_ISR_ALL _SB_MAKEMASK(4,0)
265#define M_DUART_ISR_RESERVED _SB_MAKEMASK(4,4) 270#define M_DUART_ISR_RESERVED _SB_MAKEMASK(4,4)
266 271
267/* 272/*