Merge branch 'master'

11 files changed, 107 insertions, 370 deletions

diff --git a/include/asm-mips/vr41xx/capcella.h b/include/asm-mips/vr41xx/capcella.h
index d10ffda50de7..e0ee05a3dfcc 100644
--- a/include/asm-mips/vr41xx/capcella.h
+++ b/include/asm-mips/vr41xx/capcella.h
@@ -20,7 +20,7 @@
 #ifndef __ZAO_CAPCELLA_H
 #define __ZAO_CAPCELLA_H
 
-#include <asm/vr41xx/vr41xx.h>
+#include <asm/vr41xx/irq.h>
 
 /*
  * General-Purpose I/O Pin Number
diff --git a/include/asm-mips/vr41xx/cmbvr4133.h b/include/asm-mips/vr41xx/cmbvr4133.h
index 42af389019ea..9490ade58b46 100644
--- a/include/asm-mips/vr41xx/cmbvr4133.h
+++ b/include/asm-mips/vr41xx/cmbvr4133.h
@@ -15,8 +15,7 @@
 #ifndef __NEC_CMBVR4133_H
 #define __NEC_CMBVR4133_H
 
-#include <asm/addrspace.h>
-#include <asm/vr41xx/vr41xx.h>
+#include <asm/vr41xx/irq.h>
 
 /*
  * General-Purpose I/O Pin Number
@@ -55,7 +54,4 @@
 #define IDE_SECONDARY_IRQ               I8259_IRQ(15)
 #define I8259_IRQ_LAST                  IDE_SECONDARY_IRQ
 
-#define RTC_PORT(x)     (0xaf000100 + (x))
-#define RTC_IO_EXTENT   0x140
-
 #endif /* __NEC_CMBVR4133_H */
diff --git a/include/asm-mips/vr41xx/e55.h b/include/asm-mips/vr41xx/e55.h
deleted file mode 100644
index 558f2269bf37..000000000000
--- a/include/asm-mips/vr41xx/e55.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- *  e55.h, Include file for CASIO CASSIOPEIA E-10/15/55/65.
- *
- *  Copyright (C) 2002-2004  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License
- *  along with this program; if not, write to the Free Software
- *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __CASIO_E55_H
-#define __CASIO_E55_H
-
-#include <asm/addrspace.h>
-#include <asm/vr41xx/vr41xx.h>
-
-/*
- * Board specific address mapping
- */
-#define VR41XX_ISA_MEM_BASE             0x10000000
-#define VR41XX_ISA_MEM_SIZE             0x04000000
-
-/* VR41XX_ISA_IO_BASE includes offset from real base. */
-#define VR41XX_ISA_IO_BASE              0x1400c000
-#define VR41XX_ISA_IO_SIZE              0x03ff4000
-
-#define ISA_BUS_IO_BASE                 0
-#define ISA_BUS_IO_SIZE                 VR41XX_ISA_IO_SIZE
-
-#define IO_PORT_BASE                    KSEG1ADDR(VR41XX_ISA_IO_BASE)
-#define IO_PORT_RESOURCE_START          ISA_BUS_IO_BASE
-#define IO_PORT_RESOURCE_END            (ISA_BUS_IO_BASE + ISA_BUS_IO_SIZE - 1)
-
-#endif /* __CASIO_E55_H */
diff --git a/include/asm-mips/vr41xx/irq.h b/include/asm-mips/vr41xx/irq.h
new file mode 100644
index 000000000000..d315dfbc08f2
--- /dev/null
+++ b/include/asm-mips/vr41xx/irq.h
@@ -0,0 +1,101 @@
+/*
+ * include/asm-mips/vr41xx/irq.h
+ *
+ * Interrupt numbers for NEC VR4100 series.
+ *
+ * Copyright (C) 1999 Michael Klar
+ * Copyright (C) 2001, 2002 Paul Mundt
+ * Copyright (C) 2002 MontaVista Software, Inc.
+ * Copyright (C) 2002 TimeSys Corp.
+ * Copyright (C) 2003-2006 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#ifndef __NEC_VR41XX_IRQ_H
+#define __NEC_VR41XX_IRQ_H
+
+/*
+ * CPU core Interrupt Numbers
+ */
+#define MIPS_CPU_IRQ_BASE       0
+#define MIPS_CPU_IRQ(x)         (MIPS_CPU_IRQ_BASE + (x))
+#define MIPS_SOFTINT0_IRQ       MIPS_CPU_IRQ(0)
+#define MIPS_SOFTINT1_IRQ       MIPS_CPU_IRQ(1)
+#define INT0_IRQ                MIPS_CPU_IRQ(2)
+#define INT1_IRQ                MIPS_CPU_IRQ(3)
+#define INT2_IRQ                MIPS_CPU_IRQ(4)
+#define INT3_IRQ                MIPS_CPU_IRQ(5)
+#define INT4_IRQ                MIPS_CPU_IRQ(6)
+#define TIMER_IRQ               MIPS_CPU_IRQ(7)
+
+/*
+ * SYINT1 Interrupt Numbers
+ */
+#define SYSINT1_IRQ_BASE        8
+#define SYSINT1_IRQ(x)          (SYSINT1_IRQ_BASE + (x))
+#define BATTRY_IRQ              SYSINT1_IRQ(0)
+#define POWER_IRQ               SYSINT1_IRQ(1)
+#define RTCLONG1_IRQ            SYSINT1_IRQ(2)
+#define ELAPSEDTIME_IRQ         SYSINT1_IRQ(3)
+/* RFU */
+#define PIU_IRQ                 SYSINT1_IRQ(5)
+#define AIU_IRQ                 SYSINT1_IRQ(6)
+#define KIU_IRQ                 SYSINT1_IRQ(7)
+#define GIUINT_IRQ              SYSINT1_IRQ(8)
+#define SIU_IRQ                 SYSINT1_IRQ(9)
+#define BUSERR_IRQ              SYSINT1_IRQ(10)
+#define SOFTINT_IRQ             SYSINT1_IRQ(11)
+#define CLKRUN_IRQ              SYSINT1_IRQ(12)
+#define DOZEPIU_IRQ             SYSINT1_IRQ(13)
+#define SYSINT1_IRQ_LAST        DOZEPIU_IRQ
+
+/*
+ * SYSINT2 Interrupt Numbers
+ */
+#define SYSINT2_IRQ_BASE        24
+#define SYSINT2_IRQ(x)          (SYSINT2_IRQ_BASE + (x))
+#define RTCLONG2_IRQ            SYSINT2_IRQ(0)
+#define LED_IRQ                 SYSINT2_IRQ(1)
+#define HSP_IRQ                 SYSINT2_IRQ(2)
+#define TCLOCK_IRQ              SYSINT2_IRQ(3)
+#define FIR_IRQ                 SYSINT2_IRQ(4)
+#define CEU_IRQ                 SYSINT2_IRQ(4)  /* same number as FIR_IRQ */
+#define DSIU_IRQ                SYSINT2_IRQ(5)
+#define PCI_IRQ                 SYSINT2_IRQ(6)
+#define SCU_IRQ                 SYSINT2_IRQ(7)
+#define CSI_IRQ                 SYSINT2_IRQ(8)
+#define BCU_IRQ                 SYSINT2_IRQ(9)
+#define ETHERNET_IRQ            SYSINT2_IRQ(10)
+#define SYSINT2_IRQ_LAST        ETHERNET_IRQ
+
+/*
+ * GIU Interrupt Numbers
+ */
+#define GIU_IRQ_BASE            40
+#define GIU_IRQ(x)              (GIU_IRQ_BASE + (x))    /* IRQ 40-71 */
+#define GIU_IRQ_LAST            GIU_IRQ(31)
+
+/*
+ * VRC4173 Interrupt Numbers
+ */
+#define VRC4173_IRQ_BASE        72
+#define VRC4173_IRQ(x)          (VRC4173_IRQ_BASE + (x))
+#define VRC4173_USB_IRQ         VRC4173_IRQ(0)
+#define VRC4173_PCMCIA2_IRQ     VRC4173_IRQ(1)
+#define VRC4173_PCMCIA1_IRQ     VRC4173_IRQ(2)
+#define VRC4173_PS2CH2_IRQ      VRC4173_IRQ(3)
+#define VRC4173_PS2CH1_IRQ      VRC4173_IRQ(4)
+#define VRC4173_PIU_IRQ         VRC4173_IRQ(5)
+#define VRC4173_AIU_IRQ         VRC4173_IRQ(6)
+#define VRC4173_KIU_IRQ         VRC4173_IRQ(7)
+#define VRC4173_GIU_IRQ         VRC4173_IRQ(8)
+#define VRC4173_AC97_IRQ        VRC4173_IRQ(9)
+#define VRC4173_AC97INT1_IRQ    VRC4173_IRQ(10)
+/* RFU */
+#define VRC4173_DOZEPIU_IRQ     VRC4173_IRQ(13)
+#define VRC4173_IRQ_LAST        VRC4173_DOZEPIU_IRQ
+
+#endif /* __NEC_VR41XX_IRQ_H */
diff --git a/include/asm-mips/vr41xx/mpc30x.h b/include/asm-mips/vr41xx/mpc30x.h
index a6cbe4da6667..1d67df843dc3 100644
--- a/include/asm-mips/vr41xx/mpc30x.h
+++ b/include/asm-mips/vr41xx/mpc30x.h
@@ -20,7 +20,7 @@
 #ifndef __VICTOR_MPC30X_H
 #define __VICTOR_MPC30X_H
 
-#include <asm/vr41xx/vr41xx.h>
+#include <asm/vr41xx/irq.h>
 
 /*
  * General-Purpose I/O Pin Number
diff --git a/include/asm-mips/vr41xx/tb0219.h b/include/asm-mips/vr41xx/tb0219.h
index b318b9612a83..dc981b4be0a4 100644
--- a/include/asm-mips/vr41xx/tb0219.h
+++ b/include/asm-mips/vr41xx/tb0219.h
@@ -23,7 +23,7 @@
 #ifndef __TANBAC_TB0219_H
 #define __TANBAC_TB0219_H
 
-#include <asm/vr41xx/vr41xx.h>
+#include <asm/vr41xx/irq.h>
 
 /*
  * General-Purpose I/O Pin Number
diff --git a/include/asm-mips/vr41xx/tb0226.h b/include/asm-mips/vr41xx/tb0226.h
index 2513f450e2d6..de527dcfa5f3 100644
--- a/include/asm-mips/vr41xx/tb0226.h
+++ b/include/asm-mips/vr41xx/tb0226.h
@@ -20,7 +20,7 @@
 #ifndef __TANBAC_TB0226_H
 #define __TANBAC_TB0226_H
 
-#include <asm/vr41xx/vr41xx.h>
+#include <asm/vr41xx/irq.h>
 
 /*
  * General-Purpose I/O Pin Number
diff --git a/include/asm-mips/vr41xx/tb0287.h b/include/asm-mips/vr41xx/tb0287.h
index dd9832313afe..61bead68abf0 100644
--- a/include/asm-mips/vr41xx/tb0287.h
+++ b/include/asm-mips/vr41xx/tb0287.h
@@ -22,7 +22,7 @@
 #ifndef __TANBAC_TB0287_H
 #define __TANBAC_TB0287_H
 
-#include <asm/vr41xx/vr41xx.h>
+#include <asm/vr41xx/irq.h>
 
 /*
  * General-Purpose I/O Pin Number
diff --git a/include/asm-mips/vr41xx/vr41xx.h b/include/asm-mips/vr41xx/vr41xx.h
index 70828d5fae9c..dd3eb3dc5886 100644
--- a/include/asm-mips/vr41xx/vr41xx.h
+++ b/include/asm-mips/vr41xx/vr41xx.h
@@ -74,59 +74,6 @@ extern void vr41xx_mask_clock(vr41xx_clock_t clock);
 /*
  * Interrupt Control Unit
  */
-/* CPU core Interrupt Numbers */
-#define MIPS_CPU_IRQ_BASE       0
-#define MIPS_CPU_IRQ(x)         (MIPS_CPU_IRQ_BASE + (x))
-#define MIPS_SOFTINT0_IRQ       MIPS_CPU_IRQ(0)
-#define MIPS_SOFTINT1_IRQ       MIPS_CPU_IRQ(1)
-#define INT0_IRQ                MIPS_CPU_IRQ(2)
-#define INT1_IRQ                MIPS_CPU_IRQ(3)
-#define INT2_IRQ                MIPS_CPU_IRQ(4)
-#define INT3_IRQ                MIPS_CPU_IRQ(5)
-#define INT4_IRQ                MIPS_CPU_IRQ(6)
-#define TIMER_IRQ               MIPS_CPU_IRQ(7)
-
-/* SYINT1 Interrupt Numbers */
-#define SYSINT1_IRQ_BASE        8
-#define SYSINT1_IRQ(x)          (SYSINT1_IRQ_BASE + (x))
-#define BATTRY_IRQ              SYSINT1_IRQ(0)
-#define POWER_IRQ               SYSINT1_IRQ(1)
-#define RTCLONG1_IRQ            SYSINT1_IRQ(2)
-#define ELAPSEDTIME_IRQ         SYSINT1_IRQ(3)
-/* RFU */
-#define PIU_IRQ                 SYSINT1_IRQ(5)
-#define AIU_IRQ                 SYSINT1_IRQ(6)
-#define KIU_IRQ                 SYSINT1_IRQ(7)
-#define GIUINT_IRQ              SYSINT1_IRQ(8)
-#define SIU_IRQ                 SYSINT1_IRQ(9)
-#define BUSERR_IRQ              SYSINT1_IRQ(10)
-#define SOFTINT_IRQ             SYSINT1_IRQ(11)
-#define CLKRUN_IRQ              SYSINT1_IRQ(12)
-#define DOZEPIU_IRQ             SYSINT1_IRQ(13)
-#define SYSINT1_IRQ_LAST        DOZEPIU_IRQ
-
-/* SYSINT2 Interrupt Numbers */
-#define SYSINT2_IRQ_BASE        24
-#define SYSINT2_IRQ(x)          (SYSINT2_IRQ_BASE + (x))
-#define RTCLONG2_IRQ            SYSINT2_IRQ(0)
-#define LED_IRQ                 SYSINT2_IRQ(1)
-#define HSP_IRQ                 SYSINT2_IRQ(2)
-#define TCLOCK_IRQ              SYSINT2_IRQ(3)
-#define FIR_IRQ                 SYSINT2_IRQ(4)
-#define CEU_IRQ                 SYSINT2_IRQ(4)  /* same number as FIR_IRQ */
-#define DSIU_IRQ                SYSINT2_IRQ(5)
-#define PCI_IRQ                 SYSINT2_IRQ(6)
-#define SCU_IRQ                 SYSINT2_IRQ(7)
-#define CSI_IRQ                 SYSINT2_IRQ(8)
-#define BCU_IRQ                 SYSINT2_IRQ(9)
-#define ETHERNET_IRQ            SYSINT2_IRQ(10)
-#define SYSINT2_IRQ_LAST        ETHERNET_IRQ
-
-/* GIU Interrupt Numbers */
-#define GIU_IRQ_BASE            40
-#define GIU_IRQ(x)              (GIU_IRQ_BASE + (x))    /* IRQ 40-71 */
-#define GIU_IRQ_LAST            GIU_IRQ(31)
-
 extern int vr41xx_set_intassign(unsigned int irq, unsigned char intassign);
 extern int cascade_irq(unsigned int irq, int (*get_irq)(unsigned int, struct pt_regs *));
 
diff --git a/include/asm-mips/vr41xx/vrc4173.h b/include/asm-mips/vr41xx/vrc4173.h
deleted file mode 100644
index 96fdcd54cec7..000000000000
--- a/include/asm-mips/vr41xx/vrc4173.h
+++ /dev/null
@@ -1,221 +0,0 @@
-/*
- *  vrc4173.h, Include file for NEC VRC4173.
- *
- *  Copyright (C) 2000  Michael R. McDonald
- *  Copyright (C) 2001-2003 Montavista Software Inc.
- *    Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com>
- *  Copyright (C) 2004  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
- *  Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License
- *  along with this program; if not, write to the Free Software
- *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __NEC_VRC4173_H
-#define __NEC_VRC4173_H
-
-#include <asm/io.h>
-
-/*
- * Interrupt Number
- */
-#define VRC4173_IRQ_BASE        72
-#define VRC4173_IRQ(x)          (VRC4173_IRQ_BASE + (x))
-#define VRC4173_USB_IRQ         VRC4173_IRQ(0)
-#define VRC4173_PCMCIA2_IRQ     VRC4173_IRQ(1)
-#define VRC4173_PCMCIA1_IRQ     VRC4173_IRQ(2)
-#define VRC4173_PS2CH2_IRQ      VRC4173_IRQ(3)
-#define VRC4173_PS2CH1_IRQ      VRC4173_IRQ(4)
-#define VRC4173_PIU_IRQ         VRC4173_IRQ(5)
-#define VRC4173_AIU_IRQ         VRC4173_IRQ(6)
-#define VRC4173_KIU_IRQ         VRC4173_IRQ(7)
-#define VRC4173_GIU_IRQ         VRC4173_IRQ(8)
-#define VRC4173_AC97_IRQ        VRC4173_IRQ(9)
-#define VRC4173_AC97INT1_IRQ    VRC4173_IRQ(10)
-/* RFU */
-#define VRC4173_DOZEPIU_IRQ     VRC4173_IRQ(13)
-#define VRC4173_IRQ_LAST        VRC4173_DOZEPIU_IRQ
-
-/*
- * PCI I/O accesses
- */
-#ifdef CONFIG_VRC4173
-
-extern unsigned long vrc4173_io_offset;
-
-#define set_vrc4173_io_offset(offset)   do { vrc4173_io_offset = (offset); } while (0)
-
-#define vrc4173_outb(val,port)          outb((val), vrc4173_io_offset+(port))
-#define vrc4173_outw(val,port)          outw((val), vrc4173_io_offset+(port))
-#define vrc4173_outl(val,port)          outl((val), vrc4173_io_offset+(port))
-#define vrc4173_outb_p(val,port)        outb_p((val), vrc4173_io_offset+(port))
-#define vrc4173_outw_p(val,port)        outw_p((val), vrc4173_io_offset+(port))
-#define vrc4173_outl_p(val,port)        outl_p((val), vrc4173_io_offset+(port))
-
-#define vrc4173_inb(port)               inb(vrc4173_io_offset+(port))
-#define vrc4173_inw(port)               inw(vrc4173_io_offset+(port))
-#define vrc4173_inl(port)               inl(vrc4173_io_offset+(port))
-#define vrc4173_inb_p(port)             inb_p(vrc4173_io_offset+(port))
-#define vrc4173_inw_p(port)             inw_p(vrc4173_io_offset+(port))
-#define vrc4173_inl_p(port)             inl_p(vrc4173_io_offset+(port))
-
-#define vrc4173_outsb(port,addr,count)  outsb(vrc4173_io_offset+(port),(addr),(count))
-#define vrc4173_outsw(port,addr,count)  outsw(vrc4173_io_offset+(port),(addr),(count))
-#define vrc4173_outsl(port,addr,count)  outsl(vrc4173_io_offset+(port),(addr),(count))
-
-#define vrc4173_insb(port,addr,count)   insb(vrc4173_io_offset+(port),(addr),(count))
-#define vrc4173_insw(port,addr,count)   insw(vrc4173_io_offset+(port),(addr),(count))
-#define vrc4173_insl(port,addr,count)   insl(vrc4173_io_offset+(port),(addr),(count))
-
-#else
-
-#define set_vrc4173_io_offset(offset)   do {} while (0)
-
-#define vrc4173_outb(val,port)          do {} while (0)
-#define vrc4173_outw(val,port)          do {} while (0)
-#define vrc4173_outl(val,port)          do {} while (0)
-#define vrc4173_outb_p(val,port)        do {} while (0)
-#define vrc4173_outw_p(val,port)        do {} while (0)
-#define vrc4173_outl_p(val,port)        do {} while (0)
-
-#define vrc4173_inb(port)               0
-#define vrc4173_inw(port)               0
-#define vrc4173_inl(port)               0
-#define vrc4173_inb_p(port)             0
-#define vrc4173_inw_p(port)             0
-#define vrc4173_inl_p(port)             0
-
-#define vrc4173_outsb(port,addr,count)  do {} while (0)
-#define vrc4173_outsw(port,addr,count)  do {} while (0)
-#define vrc4173_outsl(port,addr,count)  do {} while (0)
-
-#define vrc4173_insb(port,addr,count)   do {} while (0)
-#define vrc4173_insw(port,addr,count)   do {} while (0)
-#define vrc4173_insl(port,addr,count)   do {} while (0)
-
-#endif
-
-/*
- * Clock Mask Unit
- */
-typedef enum vrc4173_clock {
-        VRC4173_PIU_CLOCK,
-        VRC4173_KIU_CLOCK,
-        VRC4173_AIU_CLOCK,
-        VRC4173_PS2_CH1_CLOCK,
-        VRC4173_PS2_CH2_CLOCK,
-        VRC4173_USBU_PCI_CLOCK,
-        VRC4173_CARDU1_PCI_CLOCK,
-        VRC4173_CARDU2_PCI_CLOCK,
-        VRC4173_AC97U_PCI_CLOCK,
-        VRC4173_USBU_48MHz_CLOCK,
-        VRC4173_EXT_48MHz_CLOCK,
-        VRC4173_48MHz_CLOCK,
-} vrc4173_clock_t;
-
-#ifdef CONFIG_VRC4173
-
-extern void vrc4173_supply_clock(vrc4173_clock_t clock);
-extern void vrc4173_mask_clock(vrc4173_clock_t clock);
-
-#else
-
-static inline void vrc4173_supply_clock(vrc4173_clock_t clock) {}
-static inline void vrc4173_mask_clock(vrc4173_clock_t clock) {}
-
-#endif
-
-/*
- * Interupt Control Unit
- */
-
-#define VRC4173_PIUINT_COMMAND          0x0040
-#define VRC4173_PIUINT_DATA             0x0020
-#define VRC4173_PIUINT_PAGE1            0x0010
-#define VRC4173_PIUINT_PAGE0            0x0008
-#define VRC4173_PIUINT_DATALOST         0x0004
-#define VRC4173_PIUINT_STATUSCHANGE     0x0001
-
-#ifdef CONFIG_VRC4173
-
-extern void vrc4173_enable_piuint(uint16_t mask);
-extern void vrc4173_disable_piuint(uint16_t mask);
-
-#else
-
-static inline void vrc4173_enable_piuint(uint16_t mask) {}
-static inline void vrc4173_disable_piuint(uint16_t mask) {}
-
-#endif
-
-#define VRC4173_AIUINT_INPUT_DMAEND     0x0800
-#define VRC4173_AIUINT_INPUT_DMAHALT    0x0400
-#define VRC4173_AIUINT_INPUT_DATALOST   0x0200
-#define VRC4173_AIUINT_INPUT_DATA       0x0100
-#define VRC4173_AIUINT_OUTPUT_DMAEND    0x0008
-#define VRC4173_AIUINT_OUTPUT_DMAHALT   0x0004
-#define VRC4173_AIUINT_OUTPUT_NODATA    0x0002
-
-#ifdef CONFIG_VRC4173
-
-extern void vrc4173_enable_aiuint(uint16_t mask);
-extern void vrc4173_disable_aiuint(uint16_t mask);
-
-#else
-
-static inline void vrc4173_enable_aiuint(uint16_t mask) {}
-static inline void vrc4173_disable_aiuint(uint16_t mask) {}
-
-#endif
-
-#define VRC4173_KIUINT_DATALOST         0x0004
-#define VRC4173_KIUINT_DATAREADY        0x0002
-#define VRC4173_KIUINT_SCAN             0x0001
-
-#ifdef CONFIG_VRC4173
-
-extern void vrc4173_enable_kiuint(uint16_t mask);
-extern void vrc4173_disable_kiuint(uint16_t mask);
-
-#else
-
-static inline void vrc4173_enable_kiuint(uint16_t mask) {}
-static inline void vrc4173_disable_kiuint(uint16_t mask) {}
-
-#endif
-
-/*
- * General-Purpose I/O Unit
- */
-typedef enum vrc4173_function {
-        PS2_CHANNEL1,
-        PS2_CHANNEL2,
-        TOUCHPANEL,
-        KEYBOARD_8SCANLINES,
-        KEYBOARD_10SCANLINES,
-        KEYBOARD_12SCANLINES,
-        GPIO_0_15PINS,
-        GPIO_16_20PINS,
-} vrc4173_function_t;
-
-#ifdef CONFIG_VRC4173
-
-extern void vrc4173_select_function(vrc4173_function_t function);
-
-#else
-
-static inline void vrc4173_select_function(vrc4173_function_t function) {}
-
-#endif
-
-#endif /* __NEC_VRC4173_H */
diff --git a/include/asm-mips/vr41xx/workpad.h b/include/asm-mips/vr41xx/workpad.h
deleted file mode 100644
index 6bfa9c009a9b..000000000000
--- a/include/asm-mips/vr41xx/workpad.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- *  workpad.h, Include file for IBM WorkPad z50.
- *
- *  Copyright (C) 2002-2004  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License
- *  along with this program; if not, write to the Free Software
- *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __IBM_WORKPAD_H
-#define __IBM_WORKPAD_H
-
-#include <asm/addrspace.h>
-#include <asm/vr41xx/vr41xx.h>
-
-/*
- * Board specific address mapping
- */
-#define VR41XX_ISA_MEM_BASE             0x10000000
-#define VR41XX_ISA_MEM_SIZE             0x04000000
-
-/* VR41XX_ISA_IO_BASE includes offset from real base. */
-#define VR41XX_ISA_IO_BASE              0x15000000
-#define VR41XX_ISA_IO_SIZE              0x03000000
-
-#define ISA_BUS_IO_BASE                 0
-#define ISA_BUS_IO_SIZE                 VR41XX_ISA_IO_SIZE
-
-#define IO_PORT_BASE                    KSEG1ADDR(VR41XX_ISA_IO_BASE)
-#define IO_PORT_RESOURCE_START          ISA_BUS_IO_BASE
-#define IO_PORT_RESOURCE_END            (ISA_BUS_IO_BASE + ISA_BUS_IO_SIZE - 1)
-
-#endif /* __IBM_WORKPAD_H */