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authorYoichi Yuasa <yuasa@hh.iij4u.or.jp>2005-06-21 20:15:56 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-06-21 21:46:32 -0400
commite400bae98499583767da58fb0a1b9ad3e24fcb86 (patch)
treebd14c459c317d08de043a42b585a0c1493838cc7 /include/asm-mips/vr41xx/giu.h
parent9b843cda193c56f5e12fedeaf95e0126b706d57b (diff)
[PATCH] mips: add vr41xx gpio support
Add vr41xx gpio support. Signed-off-by: Yoichi Yuasa <yuasa@hh.iij4u.or.jp> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-mips/vr41xx/giu.h')
-rw-r--r--include/asm-mips/vr41xx/giu.h69
1 files changed, 69 insertions, 0 deletions
diff --git a/include/asm-mips/vr41xx/giu.h b/include/asm-mips/vr41xx/giu.h
new file mode 100644
index 000000000000..8590885a7638
--- /dev/null
+++ b/include/asm-mips/vr41xx/giu.h
@@ -0,0 +1,69 @@
1/*
2 * Include file for NEC VR4100 series General-purpose I/O Unit.
3 *
4 * Copyright (C) 2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __NEC_VR41XX_GIU_H
21#define __NEC_VR41XX_GIU_H
22
23typedef enum {
24 IRQ_TRIGGER_LEVEL,
25 IRQ_TRIGGER_EDGE,
26 IRQ_TRIGGER_EDGE_FALLING,
27 IRQ_TRIGGER_EDGE_RISING,
28} irq_trigger_t;
29
30typedef enum {
31 IRQ_SIGNAL_THROUGH,
32 IRQ_SIGNAL_HOLD,
33} irq_signal_t;
34
35extern void vr41xx_set_irq_trigger(unsigned int pin, irq_trigger_t trigger, irq_signal_t signal);
36
37typedef enum {
38 IRQ_LEVEL_LOW,
39 IRQ_LEVEL_HIGH,
40} irq_level_t;
41
42extern void vr41xx_set_irq_level(unsigned int pin, irq_level_t level);
43
44typedef enum {
45 GPIO_DATA_LOW,
46 GPIO_DATA_HIGH,
47 GPIO_DATA_INVAL,
48} gpio_data_t;
49
50extern gpio_data_t vr41xx_gpio_get_pin(unsigned int pin);
51extern int vr41xx_gpio_set_pin(unsigned int pin, gpio_data_t data);
52
53typedef enum {
54 GPIO_INPUT,
55 GPIO_OUTPUT,
56 GPIO_OUTPUT_DISABLE,
57} gpio_direction_t;
58
59extern int vr41xx_gpio_set_direction(unsigned int pin, gpio_direction_t dir);
60
61typedef enum {
62 GPIO_PULL_DOWN,
63 GPIO_PULL_UP,
64 GPIO_PULL_DISABLE,
65} gpio_pull_t;
66
67extern int vr41xx_gpio_pullupdown(unsigned int pin, gpio_pull_t pull);
68
69#endif /* __NEC_VR41XX_GIU_H */