diff options
author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2008-07-11 10:27:54 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2008-07-15 13:44:35 -0400 |
commit | edcaf1a6a77315562e9781245cc8e028c9a921dc (patch) | |
tree | a20a0a85071fa283c36db87a41d1a7e091a35781 /include/asm-mips/txx9 | |
parent | 766891565bdaf605ea4aebe3e75de77e848254d0 (diff) |
[MIPS] TXx9: Make single kernel can support multiple boards
Make single kernel can be used on RBTX4927/37/38. Also make
some SoC-specific code independent from board-specific code.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/txx9')
-rw-r--r-- | include/asm-mips/txx9/generic.h | 18 | ||||
-rw-r--r-- | include/asm-mips/txx9/jmr3927.h | 5 | ||||
-rw-r--r-- | include/asm-mips/txx9/rbtx4927.h | 13 | ||||
-rw-r--r-- | include/asm-mips/txx9/rbtx4938.h | 36 | ||||
-rw-r--r-- | include/asm-mips/txx9/tx4927.h | 19 | ||||
-rw-r--r-- | include/asm-mips/txx9/tx4938.h | 8 |
6 files changed, 50 insertions, 49 deletions
diff --git a/include/asm-mips/txx9/generic.h b/include/asm-mips/txx9/generic.h index 2ff6c2002204..6cd147764f19 100644 --- a/include/asm-mips/txx9/generic.h +++ b/include/asm-mips/txx9/generic.h | |||
@@ -20,4 +20,22 @@ extern unsigned int txx9_master_clock; | |||
20 | extern unsigned int txx9_cpu_clock; | 20 | extern unsigned int txx9_cpu_clock; |
21 | extern unsigned int txx9_gbus_clock; | 21 | extern unsigned int txx9_gbus_clock; |
22 | 22 | ||
23 | struct pci_dev; | ||
24 | struct txx9_board_vec { | ||
25 | unsigned long type; | ||
26 | const char *system; | ||
27 | void (*prom_init)(void); | ||
28 | void (*mem_setup)(void); | ||
29 | void (*irq_setup)(void); | ||
30 | void (*time_init)(void); | ||
31 | void (*arch_init)(void); | ||
32 | void (*device_init)(void); | ||
33 | #ifdef CONFIG_PCI | ||
34 | int (*pci_map_irq)(const struct pci_dev *dev, u8 slot, u8 pin); | ||
35 | #endif | ||
36 | }; | ||
37 | extern struct txx9_board_vec *txx9_board_vec; | ||
38 | extern int (*txx9_irq_dispatch)(int pending); | ||
39 | void prom_init_cmdline(void); | ||
40 | |||
23 | #endif /* __ASM_TXX9_GENERIC_H */ | 41 | #endif /* __ASM_TXX9_GENERIC_H */ |
diff --git a/include/asm-mips/txx9/jmr3927.h b/include/asm-mips/txx9/jmr3927.h index 29e54981a86e..d6eb1b6a54eb 100644 --- a/include/asm-mips/txx9/jmr3927.h +++ b/include/asm-mips/txx9/jmr3927.h | |||
@@ -174,4 +174,9 @@ | |||
174 | * INT[3:0] | 174 | * INT[3:0] |
175 | */ | 175 | */ |
176 | 176 | ||
177 | void jmr3927_prom_init(void); | ||
178 | void jmr3927_irq_setup(void); | ||
179 | struct pci_dev; | ||
180 | int jmr3927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); | ||
181 | |||
177 | #endif /* __ASM_TXX9_JMR3927_H */ | 182 | #endif /* __ASM_TXX9_JMR3927_H */ |
diff --git a/include/asm-mips/txx9/rbtx4927.h b/include/asm-mips/txx9/rbtx4927.h index 5b6f488b1b3c..bf194589216f 100644 --- a/include/asm-mips/txx9/rbtx4927.h +++ b/include/asm-mips/txx9/rbtx4927.h | |||
@@ -46,12 +46,16 @@ | |||
46 | #define RBTX4927_INTF_PCIB (1 << RBTX4927_INTB_PCIB) | 46 | #define RBTX4927_INTF_PCIB (1 << RBTX4927_INTB_PCIB) |
47 | #define RBTX4927_INTF_PCIA (1 << RBTX4927_INTB_PCIA) | 47 | #define RBTX4927_INTF_PCIA (1 << RBTX4927_INTB_PCIA) |
48 | 48 | ||
49 | #define RBTX4927_IRQ_IOC (TX4927_IRQ_PIC_BEG + TX4927_NUM_IR) | 49 | #define RBTX4927_NR_IRQ_IOC 8 /* IOC */ |
50 | |||
51 | #define RBTX4927_IRQ_IOC (TXX9_IRQ_BASE + TX4927_NUM_IR) | ||
50 | #define RBTX4927_IRQ_IOC_PCID (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCID) | 52 | #define RBTX4927_IRQ_IOC_PCID (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCID) |
51 | #define RBTX4927_IRQ_IOC_PCIC (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIC) | 53 | #define RBTX4927_IRQ_IOC_PCIC (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIC) |
52 | #define RBTX4927_IRQ_IOC_PCIB (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIB) | 54 | #define RBTX4927_IRQ_IOC_PCIB (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIB) |
53 | #define RBTX4927_IRQ_IOC_PCIA (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIA) | 55 | #define RBTX4927_IRQ_IOC_PCIA (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIA) |
54 | 56 | ||
57 | #define RBTX4927_IRQ_IOCINT (TXX9_IRQ_BASE + TX4927_IR_INT(1)) | ||
58 | |||
55 | #ifdef CONFIG_PCI | 59 | #ifdef CONFIG_PCI |
56 | #define RBTX4927_ISA_IO_OFFSET RBTX4927_PCIIO | 60 | #define RBTX4927_ISA_IO_OFFSET RBTX4927_PCIIO |
57 | #else | 61 | #else |
@@ -65,8 +69,11 @@ | |||
65 | #define RBTX4927_SW_RESET_ENABLE_SET 0x01 | 69 | #define RBTX4927_SW_RESET_ENABLE_SET 0x01 |
66 | 70 | ||
67 | #define RBTX4927_RTL_8019_BASE (0x1c020280 - RBTX4927_ISA_IO_OFFSET) | 71 | #define RBTX4927_RTL_8019_BASE (0x1c020280 - RBTX4927_ISA_IO_OFFSET) |
68 | #define RBTX4927_RTL_8019_IRQ (TX4927_IRQ_PIC_BEG + 5) | 72 | #define RBTX4927_RTL_8019_IRQ (TXX9_IRQ_BASE + TX4927_IR_INT(3)) |
69 | 73 | ||
70 | int toshiba_rbtx4927_irq_nested(int sw_irq); | 74 | void rbtx4927_prom_init(void); |
75 | void rbtx4927_irq_setup(void); | ||
76 | struct pci_dev; | ||
77 | int rbtx4927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); | ||
71 | 78 | ||
72 | #endif /* __ASM_TXX9_RBTX4927_H */ | 79 | #endif /* __ASM_TXX9_RBTX4927_H */ |
diff --git a/include/asm-mips/txx9/rbtx4938.h b/include/asm-mips/txx9/rbtx4938.h index 8450f735d056..2f5d5e705a41 100644 --- a/include/asm-mips/txx9/rbtx4938.h +++ b/include/asm-mips/txx9/rbtx4938.h | |||
@@ -101,35 +101,12 @@ | |||
101 | * that particular IRQ on an RBTX4938 machine. Add new 'spaces' as new | 101 | * that particular IRQ on an RBTX4938 machine. Add new 'spaces' as new |
102 | * IRQ hardware is supported. | 102 | * IRQ hardware is supported. |
103 | */ | 103 | */ |
104 | #define RBTX4938_NR_IRQ_LOCAL 8 | ||
105 | #define RBTX4938_NR_IRQ_IRC 32 /* On-Chip IRC */ | ||
106 | #define RBTX4938_NR_IRQ_IOC 8 | 104 | #define RBTX4938_NR_IRQ_IOC 8 |
107 | 105 | ||
108 | #define TX4938_IRQ_CP0_BEG MIPS_CPU_IRQ_BASE | 106 | #define RBTX4938_IRQ_IRC TXX9_IRQ_BASE |
109 | #define TX4938_IRQ_CP0_END (MIPS_CPU_IRQ_BASE + 8 - 1) | 107 | #define RBTX4938_IRQ_IOC (TXX9_IRQ_BASE + TX4938_NUM_IR) |
110 | |||
111 | #define TX4938_IRQ_PIC_BEG TXX9_IRQ_BASE | ||
112 | #define TX4938_IRQ_PIC_END (TXX9_IRQ_BASE + TXx9_MAX_IR - 1) | ||
113 | #define TX4938_IRQ_NEST_EXT_ON_PIC (TX4938_IRQ_PIC_BEG+2) | ||
114 | #define TX4938_IRQ_NEST_PIC_ON_CP0 (TX4938_IRQ_CP0_BEG+2) | ||
115 | #define TX4938_IRQ_USER0 (TX4938_IRQ_CP0_BEG+0) | ||
116 | #define TX4938_IRQ_USER1 (TX4938_IRQ_CP0_BEG+1) | ||
117 | #define TX4938_IRQ_CPU_TIMER (TX4938_IRQ_CP0_BEG+7) | ||
118 | |||
119 | #define TOSHIBA_RBTX4938_IRQ_IOC_RAW_BEG 0 | ||
120 | #define TOSHIBA_RBTX4938_IRQ_IOC_RAW_END 7 | ||
121 | |||
122 | #define TOSHIBA_RBTX4938_IRQ_IOC_BEG ((TX4938_IRQ_PIC_END+1)+TOSHIBA_RBTX4938_IRQ_IOC_RAW_BEG) /* 56 */ | ||
123 | #define TOSHIBA_RBTX4938_IRQ_IOC_END ((TX4938_IRQ_PIC_END+1)+TOSHIBA_RBTX4938_IRQ_IOC_RAW_END) /* 63 */ | ||
124 | #define RBTX4938_IRQ_LOCAL TX4938_IRQ_CP0_BEG | ||
125 | #define RBTX4938_IRQ_IRC (RBTX4938_IRQ_LOCAL + RBTX4938_NR_IRQ_LOCAL) | ||
126 | #define RBTX4938_IRQ_IOC (RBTX4938_IRQ_IRC + RBTX4938_NR_IRQ_IRC) | ||
127 | #define RBTX4938_IRQ_END (RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC) | 108 | #define RBTX4938_IRQ_END (RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC) |
128 | 109 | ||
129 | #define RBTX4938_IRQ_LOCAL_SOFT0 (RBTX4938_IRQ_LOCAL + RBTX4938_SOFT_INT0) | ||
130 | #define RBTX4938_IRQ_LOCAL_SOFT1 (RBTX4938_IRQ_LOCAL + RBTX4938_SOFT_INT1) | ||
131 | #define RBTX4938_IRQ_LOCAL_IRC (RBTX4938_IRQ_LOCAL + RBTX4938_IRC_INT) | ||
132 | #define RBTX4938_IRQ_LOCAL_TIMER (RBTX4938_IRQ_LOCAL + RBTX4938_TIMER_INT) | ||
133 | #define RBTX4938_IRQ_IRC_ECCERR (RBTX4938_IRQ_IRC + TX4938_IR_ECCERR) | 110 | #define RBTX4938_IRQ_IRC_ECCERR (RBTX4938_IRQ_IRC + TX4938_IR_ECCERR) |
134 | #define RBTX4938_IRQ_IRC_WTOERR (RBTX4938_IRQ_IRC + TX4938_IR_WTOERR) | 111 | #define RBTX4938_IRQ_IRC_WTOERR (RBTX4938_IRQ_IRC + TX4938_IR_WTOERR) |
135 | #define RBTX4938_IRQ_IRC_INT(n) (RBTX4938_IRQ_IRC + TX4938_IR_INT(n)) | 112 | #define RBTX4938_IRQ_IRC_INT(n) (RBTX4938_IRQ_IRC + TX4938_IR_INT(n)) |
@@ -157,11 +134,16 @@ | |||
157 | 134 | ||
158 | 135 | ||
159 | /* IOC (PCI, etc) */ | 136 | /* IOC (PCI, etc) */ |
160 | #define RBTX4938_IRQ_IOCINT (TX4938_IRQ_NEST_EXT_ON_PIC) | 137 | #define RBTX4938_IRQ_IOCINT (TXX9_IRQ_BASE + TX4938_IR_INT(0)) |
161 | /* Onboard 10M Ether */ | 138 | /* Onboard 10M Ether */ |
162 | #define RBTX4938_IRQ_ETHER (TX4938_IRQ_NEST_EXT_ON_PIC + 1) | 139 | #define RBTX4938_IRQ_ETHER (TXX9_IRQ_BASE + TX4938_IR_INT(1)) |
163 | 140 | ||
164 | #define RBTX4938_RTL_8019_BASE (RBTX4938_ETHER_ADDR - mips_io_port_base) | 141 | #define RBTX4938_RTL_8019_BASE (RBTX4938_ETHER_ADDR - mips_io_port_base) |
165 | #define RBTX4938_RTL_8019_IRQ (RBTX4938_IRQ_ETHER) | 142 | #define RBTX4938_RTL_8019_IRQ (RBTX4938_IRQ_ETHER) |
166 | 143 | ||
144 | void rbtx4938_prom_init(void); | ||
145 | void rbtx4938_irq_setup(void); | ||
146 | struct pci_dev; | ||
147 | int rbtx4938_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); | ||
148 | |||
167 | #endif /* __ASM_TXX9_RBTX4938_H */ | 149 | #endif /* __ASM_TXX9_RBTX4938_H */ |
diff --git a/include/asm-mips/txx9/tx4927.h b/include/asm-mips/txx9/tx4927.h index c0382fd2ae7f..46d60afc038b 100644 --- a/include/asm-mips/txx9/tx4927.h +++ b/include/asm-mips/txx9/tx4927.h | |||
@@ -32,20 +32,6 @@ | |||
32 | #include <asm/txx9irq.h> | 32 | #include <asm/txx9irq.h> |
33 | #include <asm/txx9/tx4927pcic.h> | 33 | #include <asm/txx9/tx4927pcic.h> |
34 | 34 | ||
35 | #define TX4927_IRQ_CP0_BEG MIPS_CPU_IRQ_BASE | ||
36 | #define TX4927_IRQ_CP0_END (MIPS_CPU_IRQ_BASE + 8 - 1) | ||
37 | |||
38 | #define TX4927_IRQ_PIC_BEG TXX9_IRQ_BASE | ||
39 | #define TX4927_IRQ_PIC_END (TXX9_IRQ_BASE + TXx9_MAX_IR - 1) | ||
40 | |||
41 | |||
42 | #define TX4927_IRQ_USER0 (TX4927_IRQ_CP0_BEG+0) | ||
43 | #define TX4927_IRQ_USER1 (TX4927_IRQ_CP0_BEG+1) | ||
44 | #define TX4927_IRQ_NEST_PIC_ON_CP0 (TX4927_IRQ_CP0_BEG+2) | ||
45 | #define TX4927_IRQ_CPU_TIMER (TX4927_IRQ_CP0_BEG+7) | ||
46 | |||
47 | #define TX4927_IRQ_NEST_EXT_ON_PIC (TX4927_IRQ_PIC_BEG+3) | ||
48 | |||
49 | #define TX4927_SDRAMC_REG 0xff1f8000 | 35 | #define TX4927_SDRAMC_REG 0xff1f8000 |
50 | #define TX4927_EBUSC_REG 0xff1f9000 | 36 | #define TX4927_EBUSC_REG 0xff1f9000 |
51 | #define TX4927_PCIC_REG 0xff1fd000 | 37 | #define TX4927_PCIC_REG 0xff1fd000 |
@@ -54,10 +40,14 @@ | |||
54 | #define TX4927_NR_TMR 3 | 40 | #define TX4927_NR_TMR 3 |
55 | #define TX4927_TMR_REG(ch) (0xff1ff000 + (ch) * 0x100) | 41 | #define TX4927_TMR_REG(ch) (0xff1ff000 + (ch) * 0x100) |
56 | 42 | ||
43 | #define TX4927_IR_INT(n) (2 + (n)) | ||
44 | #define TX4927_IR_SIO(n) (8 + (n)) | ||
57 | #define TX4927_IR_PCIC 16 | 45 | #define TX4927_IR_PCIC 16 |
58 | #define TX4927_IR_PCIERR 22 | 46 | #define TX4927_IR_PCIERR 22 |
59 | #define TX4927_NUM_IR 32 | 47 | #define TX4927_NUM_IR 32 |
60 | 48 | ||
49 | #define TX4927_IRC_INT 2 /* IP[2] in Status register */ | ||
50 | |||
61 | struct tx4927_sdramc_reg { | 51 | struct tx4927_sdramc_reg { |
62 | volatile unsigned long long cr[4]; | 52 | volatile unsigned long long cr[4]; |
63 | volatile unsigned long long unused0[4]; | 53 | volatile unsigned long long unused0[4]; |
@@ -224,5 +214,6 @@ static inline void tx4927_ccfg_change(__u64 change, __u64 new) | |||
224 | 214 | ||
225 | int tx4927_report_pciclk(void); | 215 | int tx4927_report_pciclk(void); |
226 | int tx4927_pciclk66_setup(void); | 216 | int tx4927_pciclk66_setup(void); |
217 | void tx4927_irq_init(void); | ||
227 | 218 | ||
228 | #endif /* __ASM_TXX9_TX4927_H */ | 219 | #endif /* __ASM_TXX9_TX4927_H */ |
diff --git a/include/asm-mips/txx9/tx4938.h b/include/asm-mips/txx9/tx4938.h index 0bb891993b08..12de68a4c10a 100644 --- a/include/asm-mips/txx9/tx4938.h +++ b/include/asm-mips/txx9/tx4938.h | |||
@@ -18,11 +18,6 @@ | |||
18 | #define tx4938_read_nfmc(addr) (*(volatile unsigned int *)(addr)) | 18 | #define tx4938_read_nfmc(addr) (*(volatile unsigned int *)(addr)) |
19 | #define tx4938_write_nfmc(b, addr) (*(volatile unsigned int *)(addr)) = (b) | 19 | #define tx4938_write_nfmc(b, addr) (*(volatile unsigned int *)(addr)) = (b) |
20 | 20 | ||
21 | #define TX4938_NR_IRQ_LOCAL TX4938_IRQ_PIC_BEG | ||
22 | |||
23 | #define TX4938_IRQ_IRC_PCIC (TX4938_NR_IRQ_LOCAL + TX4938_IR_PCIC) | ||
24 | #define TX4938_IRQ_IRC_PCIERR (TX4938_NR_IRQ_LOCAL + TX4938_IR_PCIERR) | ||
25 | |||
26 | #define TX4938_PCIIO_0 0x10000000 | 21 | #define TX4938_PCIIO_0 0x10000000 |
27 | #define TX4938_PCIIO_1 0x01010000 | 22 | #define TX4938_PCIIO_1 0x01010000 |
28 | #define TX4938_PCIMEM_0 0x08000000 | 23 | #define TX4938_PCIMEM_0 0x08000000 |
@@ -271,6 +266,8 @@ struct tx4938_ccfg_reg { | |||
271 | #define TX4938_IR_ETH0 TX4938_IR_INT(4) | 266 | #define TX4938_IR_ETH0 TX4938_IR_INT(4) |
272 | #define TX4938_IR_ETH1 TX4938_IR_INT(3) | 267 | #define TX4938_IR_ETH1 TX4938_IR_INT(3) |
273 | 268 | ||
269 | #define TX4938_IRC_INT 2 /* IP[2] in Status register */ | ||
270 | |||
274 | /* | 271 | /* |
275 | * CCFG | 272 | * CCFG |
276 | */ | 273 | */ |
@@ -463,5 +460,6 @@ void tx4938_report_pci1clk(void); | |||
463 | int tx4938_pciclk66_setup(void); | 460 | int tx4938_pciclk66_setup(void); |
464 | struct pci_dev; | 461 | struct pci_dev; |
465 | int tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot); | 462 | int tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot); |
463 | void tx4938_irq_init(void); | ||
466 | 464 | ||
467 | #endif | 465 | #endif |