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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2008-07-10 11:33:08 -0400
committerRalf Baechle <ralf@linux-mips.org>2008-07-15 13:44:35 -0400
commit89d63fe179520b11f54de1f26755b7444c79e73a (patch)
treefede06c5648335652c864fc35c951d991cbab183 /include/asm-mips/txx9/tx4938.h
parent22b1d707ffc99faebd86257ad19d5bb9fc624734 (diff)
[MIPS] TXx9: Reorganize PCI code
Split out PCIC dependent code and SoC dependent code from board dependent code. Now TX4927 PCIC code is independent from TX4927/TX4938 SoC code. Also fix some build problems on CONFIG_PCI=n. As a bonus, "FPCIB0 Backplane Support" is available for all TX39/TX49 boards and PCI66 support is available for all TX49 boards. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/txx9/tx4938.h')
-rw-r--r--include/asm-mips/txx9/tx4938.h226
1 files changed, 33 insertions, 193 deletions
diff --git a/include/asm-mips/txx9/tx4938.h b/include/asm-mips/txx9/tx4938.h
index 7f9cfef1c6d2..0bb891993b08 100644
--- a/include/asm-mips/txx9/tx4938.h
+++ b/include/asm-mips/txx9/tx4938.h
@@ -12,6 +12,9 @@
12#ifndef __ASM_TXX9_TX4938_H 12#ifndef __ASM_TXX9_TX4938_H
13#define __ASM_TXX9_TX4938_H 13#define __ASM_TXX9_TX4938_H
14 14
15/* some controllers are compatible with 4927 */
16#include <asm/txx9/tx4927.h>
17
15#define tx4938_read_nfmc(addr) (*(volatile unsigned int *)(addr)) 18#define tx4938_read_nfmc(addr) (*(volatile unsigned int *)(addr))
16#define tx4938_write_nfmc(b, addr) (*(volatile unsigned int *)(addr)) = (b) 19#define tx4938_write_nfmc(b, addr) (*(volatile unsigned int *)(addr)) = (b)
17 20
@@ -51,9 +54,6 @@
51#define TX4938_ACLC_REG (TX4938_REG_BASE + 0xf700) 54#define TX4938_ACLC_REG (TX4938_REG_BASE + 0xf700)
52#define TX4938_SPI_REG (TX4938_REG_BASE + 0xf800) 55#define TX4938_SPI_REG (TX4938_REG_BASE + 0xf800)
53 56
54#ifdef __ASSEMBLY__
55#define _CONST64(c) c
56#else
57#define _CONST64(c) c##ull 57#define _CONST64(c) c##ull
58 58
59#include <asm/byteorder.h> 59#include <asm/byteorder.h>
@@ -113,68 +113,6 @@ struct tx4938_dma_reg {
113 endian_def_l2(unused0, mcr); 113 endian_def_l2(unused0, mcr);
114}; 114};
115 115
116struct tx4938_pcic_reg {
117 volatile unsigned long pciid;
118 volatile unsigned long pcistatus;
119 volatile unsigned long pciccrev;
120 volatile unsigned long pcicfg1;
121 volatile unsigned long p2gm0plbase; /* +10 */
122 volatile unsigned long p2gm0pubase;
123 volatile unsigned long p2gm1plbase;
124 volatile unsigned long p2gm1pubase;
125 volatile unsigned long p2gm2pbase; /* +20 */
126 volatile unsigned long p2giopbase;
127 volatile unsigned long unused0;
128 volatile unsigned long pcisid;
129 volatile unsigned long unused1; /* +30 */
130 volatile unsigned long pcicapptr;
131 volatile unsigned long unused2;
132 volatile unsigned long pcicfg2;
133 volatile unsigned long g2ptocnt; /* +40 */
134 volatile unsigned long unused3[15];
135 volatile unsigned long g2pstatus; /* +80 */
136 volatile unsigned long g2pmask;
137 volatile unsigned long pcisstatus;
138 volatile unsigned long pcimask;
139 volatile unsigned long p2gcfg; /* +90 */
140 volatile unsigned long p2gstatus;
141 volatile unsigned long p2gmask;
142 volatile unsigned long p2gccmd;
143 volatile unsigned long unused4[24]; /* +a0 */
144 volatile unsigned long pbareqport; /* +100 */
145 volatile unsigned long pbacfg;
146 volatile unsigned long pbastatus;
147 volatile unsigned long pbamask;
148 volatile unsigned long pbabm; /* +110 */
149 volatile unsigned long pbacreq;
150 volatile unsigned long pbacgnt;
151 volatile unsigned long pbacstate;
152 volatile unsigned long long g2pmgbase[3]; /* +120 */
153 volatile unsigned long long g2piogbase;
154 volatile unsigned long g2pmmask[3]; /* +140 */
155 volatile unsigned long g2piomask;
156 volatile unsigned long long g2pmpbase[3]; /* +150 */
157 volatile unsigned long long g2piopbase;
158 volatile unsigned long pciccfg; /* +170 */
159 volatile unsigned long pcicstatus;
160 volatile unsigned long pcicmask;
161 volatile unsigned long unused5;
162 volatile unsigned long long p2gmgbase[3]; /* +180 */
163 volatile unsigned long long p2giogbase;
164 volatile unsigned long g2pcfgadrs; /* +1a0 */
165 volatile unsigned long g2pcfgdata;
166 volatile unsigned long unused6[8];
167 volatile unsigned long g2pintack;
168 volatile unsigned long g2pspc;
169 volatile unsigned long unused7[12]; /* +1d0 */
170 volatile unsigned long long pdmca; /* +200 */
171 volatile unsigned long long pdmga;
172 volatile unsigned long long pdmpa;
173 volatile unsigned long long pdmctr;
174 volatile unsigned long long pdmcfg; /* +220 */
175 volatile unsigned long long pdmsts;
176};
177
178struct tx4938_aclc_reg { 116struct tx4938_aclc_reg {
179 volatile unsigned long acctlen; 117 volatile unsigned long acctlen;
180 volatile unsigned long acctldis; 118 volatile unsigned long acctldis;
@@ -262,18 +200,18 @@ struct tx4938_sramc_reg {
262}; 200};
263 201
264struct tx4938_ccfg_reg { 202struct tx4938_ccfg_reg {
265 volatile unsigned long long ccfg; 203 u64 ccfg;
266 volatile unsigned long long crir; 204 u64 crir;
267 volatile unsigned long long pcfg; 205 u64 pcfg;
268 volatile unsigned long long tear; 206 u64 toea;
269 volatile unsigned long long clkctr; 207 u64 clkctr;
270 volatile unsigned long long unused0; 208 u64 unused0;
271 volatile unsigned long long garbc; 209 u64 garbc;
272 volatile unsigned long long unused1; 210 u64 unused1;
273 volatile unsigned long long unused2; 211 u64 unused2;
274 volatile unsigned long long ramp; 212 u64 ramp;
275 volatile unsigned long long unused3; 213 u64 unused3;
276 volatile unsigned long long jmpadr; 214 u64 jmpadr;
277}; 215};
278 216
279#undef endian_def_l2 217#undef endian_def_l2
@@ -282,8 +220,6 @@ struct tx4938_ccfg_reg {
282#undef endian_def_b2s 220#undef endian_def_b2s
283#undef endian_def_b4 221#undef endian_def_b4
284 222
285#endif /* __ASSEMBLY__ */
286
287/* 223/*
288 * NDFMC 224 * NDFMC
289 */ 225 */
@@ -360,7 +296,7 @@ struct tx4938_ccfg_reg {
360#define TX4938_CCFG_BEOW 0x00010000 296#define TX4938_CCFG_BEOW 0x00010000
361#define TX4938_CCFG_WR 0x00008000 297#define TX4938_CCFG_WR 0x00008000
362#define TX4938_CCFG_TOE 0x00004000 298#define TX4938_CCFG_TOE 0x00004000
363#define TX4938_CCFG_PCIXARB 0x00002000 299#define TX4938_CCFG_PCIARB 0x00002000
364#define TX4938_CCFG_PCIDIVMODE_MASK 0x00001c00 300#define TX4938_CCFG_PCIDIVMODE_MASK 0x00001c00
365#define TX4938_CCFG_PCIDIVMODE_4 (0x1 << 10) 301#define TX4938_CCFG_PCIDIVMODE_4 (0x1 << 10)
366#define TX4938_CCFG_PCIDIVMODE_4_5 (0x3 << 10) 302#define TX4938_CCFG_PCIDIVMODE_4_5 (0x3 << 10)
@@ -436,110 +372,6 @@ struct tx4938_ccfg_reg {
436#define TX4938_CLKCTR_SIO0RST 0x00000002 372#define TX4938_CLKCTR_SIO0RST 0x00000002
437#define TX4938_CLKCTR_SIO1RST 0x00000001 373#define TX4938_CLKCTR_SIO1RST 0x00000001
438 374
439/* bits for G2PSTATUS/G2PMASK */
440#define TX4938_PCIC_G2PSTATUS_ALL 0x00000003
441#define TX4938_PCIC_G2PSTATUS_TTOE 0x00000002
442#define TX4938_PCIC_G2PSTATUS_RTOE 0x00000001
443
444/* bits for PCIMASK (see also PCI_STATUS_XXX in linux/pci.h */
445#define TX4938_PCIC_PCISTATUS_ALL 0x0000f900
446
447/* bits for PBACFG */
448#define TX4938_PCIC_PBACFG_FIXPA 0x00000008
449#define TX4938_PCIC_PBACFG_RPBA 0x00000004
450#define TX4938_PCIC_PBACFG_PBAEN 0x00000002
451#define TX4938_PCIC_PBACFG_BMCEN 0x00000001
452
453/* bits for G2PMnGBASE */
454#define TX4938_PCIC_G2PMnGBASE_BSDIS _CONST64(0x0000002000000000)
455#define TX4938_PCIC_G2PMnGBASE_ECHG _CONST64(0x0000001000000000)
456
457/* bits for G2PIOGBASE */
458#define TX4938_PCIC_G2PIOGBASE_BSDIS _CONST64(0x0000002000000000)
459#define TX4938_PCIC_G2PIOGBASE_ECHG _CONST64(0x0000001000000000)
460
461/* bits for PCICSTATUS/PCICMASK */
462#define TX4938_PCIC_PCICSTATUS_ALL 0x000007b8
463#define TX4938_PCIC_PCICSTATUS_PME 0x00000400
464#define TX4938_PCIC_PCICSTATUS_TLB 0x00000200
465#define TX4938_PCIC_PCICSTATUS_NIB 0x00000100
466#define TX4938_PCIC_PCICSTATUS_ZIB 0x00000080
467#define TX4938_PCIC_PCICSTATUS_PERR 0x00000020
468#define TX4938_PCIC_PCICSTATUS_SERR 0x00000010
469#define TX4938_PCIC_PCICSTATUS_GBE 0x00000008
470#define TX4938_PCIC_PCICSTATUS_IWB 0x00000002
471#define TX4938_PCIC_PCICSTATUS_E2PDONE 0x00000001
472
473/* bits for PCICCFG */
474#define TX4938_PCIC_PCICCFG_GBWC_MASK 0x0fff0000
475#define TX4938_PCIC_PCICCFG_HRST 0x00000800
476#define TX4938_PCIC_PCICCFG_SRST 0x00000400
477#define TX4938_PCIC_PCICCFG_IRBER 0x00000200
478#define TX4938_PCIC_PCICCFG_G2PMEN(ch) (0x00000100>>(ch))
479#define TX4938_PCIC_PCICCFG_G2PM0EN 0x00000100
480#define TX4938_PCIC_PCICCFG_G2PM1EN 0x00000080
481#define TX4938_PCIC_PCICCFG_G2PM2EN 0x00000040
482#define TX4938_PCIC_PCICCFG_G2PIOEN 0x00000020
483#define TX4938_PCIC_PCICCFG_TCAR 0x00000010
484#define TX4938_PCIC_PCICCFG_ICAEN 0x00000008
485
486/* bits for P2GMnGBASE */
487#define TX4938_PCIC_P2GMnGBASE_TMEMEN _CONST64(0x0000004000000000)
488#define TX4938_PCIC_P2GMnGBASE_TBSDIS _CONST64(0x0000002000000000)
489#define TX4938_PCIC_P2GMnGBASE_TECHG _CONST64(0x0000001000000000)
490
491/* bits for P2GIOGBASE */
492#define TX4938_PCIC_P2GIOGBASE_TIOEN _CONST64(0x0000004000000000)
493#define TX4938_PCIC_P2GIOGBASE_TBSDIS _CONST64(0x0000002000000000)
494#define TX4938_PCIC_P2GIOGBASE_TECHG _CONST64(0x0000001000000000)
495
496#define TX4938_PCIC_IDSEL_AD_TO_SLOT(ad) ((ad) - 11)
497#define TX4938_PCIC_MAX_DEVNU TX4938_PCIC_IDSEL_AD_TO_SLOT(32)
498
499/* bits for PDMCFG */
500#define TX4938_PCIC_PDMCFG_RSTFIFO 0x00200000
501#define TX4938_PCIC_PDMCFG_EXFER 0x00100000
502#define TX4938_PCIC_PDMCFG_REQDLY_MASK 0x00003800
503#define TX4938_PCIC_PDMCFG_REQDLY_NONE (0 << 11)
504#define TX4938_PCIC_PDMCFG_REQDLY_16 (1 << 11)
505#define TX4938_PCIC_PDMCFG_REQDLY_32 (2 << 11)
506#define TX4938_PCIC_PDMCFG_REQDLY_64 (3 << 11)
507#define TX4938_PCIC_PDMCFG_REQDLY_128 (4 << 11)
508#define TX4938_PCIC_PDMCFG_REQDLY_256 (5 << 11)
509#define TX4938_PCIC_PDMCFG_REQDLY_512 (6 << 11)
510#define TX4938_PCIC_PDMCFG_REQDLY_1024 (7 << 11)
511#define TX4938_PCIC_PDMCFG_ERRIE 0x00000400
512#define TX4938_PCIC_PDMCFG_NCCMPIE 0x00000200
513#define TX4938_PCIC_PDMCFG_NTCMPIE 0x00000100
514#define TX4938_PCIC_PDMCFG_CHNEN 0x00000080
515#define TX4938_PCIC_PDMCFG_XFRACT 0x00000040
516#define TX4938_PCIC_PDMCFG_BSWAP 0x00000020
517#define TX4938_PCIC_PDMCFG_XFRSIZE_MASK 0x0000000c
518#define TX4938_PCIC_PDMCFG_XFRSIZE_1DW 0x00000000
519#define TX4938_PCIC_PDMCFG_XFRSIZE_1QW 0x00000004
520#define TX4938_PCIC_PDMCFG_XFRSIZE_4QW 0x00000008
521#define TX4938_PCIC_PDMCFG_XFRDIRC 0x00000002
522#define TX4938_PCIC_PDMCFG_CHRST 0x00000001
523
524/* bits for PDMSTS */
525#define TX4938_PCIC_PDMSTS_REQCNT_MASK 0x3f000000
526#define TX4938_PCIC_PDMSTS_FIFOCNT_MASK 0x00f00000
527#define TX4938_PCIC_PDMSTS_FIFOWP_MASK 0x000c0000
528#define TX4938_PCIC_PDMSTS_FIFORP_MASK 0x00030000
529#define TX4938_PCIC_PDMSTS_ERRINT 0x00000800
530#define TX4938_PCIC_PDMSTS_DONEINT 0x00000400
531#define TX4938_PCIC_PDMSTS_CHNEN 0x00000200
532#define TX4938_PCIC_PDMSTS_XFRACT 0x00000100
533#define TX4938_PCIC_PDMSTS_ACCMP 0x00000080
534#define TX4938_PCIC_PDMSTS_NCCMP 0x00000040
535#define TX4938_PCIC_PDMSTS_NTCMP 0x00000020
536#define TX4938_PCIC_PDMSTS_CFGERR 0x00000008
537#define TX4938_PCIC_PDMSTS_PCIERR 0x00000004
538#define TX4938_PCIC_PDMSTS_CHNERR 0x00000002
539#define TX4938_PCIC_PDMSTS_DATAERR 0x00000001
540#define TX4938_PCIC_PDMSTS_ALL_CMP 0x000000e0
541#define TX4938_PCIC_PDMSTS_ALL_ERR 0x0000000f
542
543/* 375/*
544 * DMA 376 * DMA
545 */ 377 */
@@ -595,15 +427,15 @@ struct tx4938_ccfg_reg {
595#define TX4938_DMA_CSR_DESERR 0x00000002 427#define TX4938_DMA_CSR_DESERR 0x00000002
596#define TX4938_DMA_CSR_SORERR 0x00000001 428#define TX4938_DMA_CSR_SORERR 0x00000001
597 429
598#ifndef __ASSEMBLY__
599
600#define tx4938_sdramcptr ((struct tx4938_sdramc_reg *)TX4938_SDRAMC_REG) 430#define tx4938_sdramcptr ((struct tx4938_sdramc_reg *)TX4938_SDRAMC_REG)
601#define tx4938_ebuscptr ((struct tx4938_ebusc_reg *)TX4938_EBUSC_REG) 431#define tx4938_ebuscptr ((struct tx4938_ebusc_reg *)TX4938_EBUSC_REG)
602#define tx4938_dmaptr(ch) ((struct tx4938_dma_reg *)TX4938_DMA_REG(ch)) 432#define tx4938_dmaptr(ch) ((struct tx4938_dma_reg *)TX4938_DMA_REG(ch))
603#define tx4938_ndfmcptr ((struct tx4938_ndfmc_reg *)TX4938_NDFMC_REG) 433#define tx4938_ndfmcptr ((struct tx4938_ndfmc_reg *)TX4938_NDFMC_REG)
604#define tx4938_pcicptr ((struct tx4938_pcic_reg *)TX4938_PCIC_REG) 434#define tx4938_pcicptr tx4927_pcicptr
605#define tx4938_pcic1ptr ((struct tx4938_pcic_reg *)TX4938_PCIC1_REG) 435#define tx4938_pcic1ptr \
606#define tx4938_ccfgptr ((struct tx4938_ccfg_reg *)TX4938_CCFG_REG) 436 ((struct tx4927_pcic_reg __iomem *)TX4938_PCIC1_REG)
437#define tx4938_ccfgptr \
438 ((struct tx4938_ccfg_reg __iomem *)TX4938_CCFG_REG)
607#define tx4938_sioptr(ch) ((struct tx4938_sio_reg *)TX4938_SIO_REG(ch)) 439#define tx4938_sioptr(ch) ((struct tx4938_sio_reg *)TX4938_SIO_REG(ch))
608#define tx4938_pioptr ((struct txx9_pio_reg __iomem *)TX4938_PIO_REG) 440#define tx4938_pioptr ((struct txx9_pio_reg __iomem *)TX4938_PIO_REG)
609#define tx4938_aclcptr ((struct tx4938_aclc_reg *)TX4938_ACLC_REG) 441#define tx4938_aclcptr ((struct tx4938_aclc_reg *)TX4938_ACLC_REG)
@@ -611,17 +443,25 @@ struct tx4938_ccfg_reg {
611#define tx4938_sramcptr ((struct tx4938_sramc_reg *)TX4938_SRAMC_REG) 443#define tx4938_sramcptr ((struct tx4938_sramc_reg *)TX4938_SRAMC_REG)
612 444
613 445
614#define TX4938_REV_MAJ_MIN() ((unsigned long)tx4938_ccfgptr->crir & 0x00ff) 446#define TX4938_REV_PCODE() \
615#define TX4938_REV_PCODE() ((unsigned long)tx4938_ccfgptr->crir >> 16) 447 ((__u32)__raw_readq(&tx4938_ccfgptr->crir) >> 16)
448
449#define tx4938_ccfg_clear(bits) tx4927_ccfg_clear(bits)
450#define tx4938_ccfg_set(bits) tx4927_ccfg_set(bits)
451#define tx4938_ccfg_change(change, new) tx4927_ccfg_change(change, new)
616 452
617#define TX4938_SDRAMC_BA(ch) ((tx4938_sdramcptr->cr[ch] >> 49) << 21) 453#define TX4938_SDRAMC_BA(ch) ((tx4938_sdramcptr->cr[ch] >> 49) << 21)
618#define TX4938_SDRAMC_SIZE(ch) (((tx4938_sdramcptr->cr[ch] >> 33) + 1) << 21) 454#define TX4938_SDRAMC_SIZE(ch) (((tx4938_sdramcptr->cr[ch] >> 33) + 1) << 21)
619 455
456#define TX4938_EBUSC_CR(ch) __raw_readq(&tx4938_ebuscptr->cr[(ch)])
620#define TX4938_EBUSC_BA(ch) ((tx4938_ebuscptr->cr[ch] >> 48) << 20) 457#define TX4938_EBUSC_BA(ch) ((tx4938_ebuscptr->cr[ch] >> 48) << 20)
621#define TX4938_EBUSC_SIZE(ch) \ 458#define TX4938_EBUSC_SIZE(ch) \
622 (0x00100000 << ((unsigned long)(tx4938_ebuscptr->cr[ch] >> 8) & 0xf)) 459 (0x00100000 << ((unsigned long)(tx4938_ebuscptr->cr[ch] >> 8) & 0xf))
623 460
624 461int tx4938_report_pciclk(void);
625#endif /* !__ASSEMBLY__ */ 462void tx4938_report_pci1clk(void);
463int tx4938_pciclk66_setup(void);
464struct pci_dev;
465int tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot);
626 466
627#endif 467#endif