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authorLinus Torvalds <torvalds@linux-foundation.org>2008-07-21 00:14:00 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-07-21 00:14:00 -0400
commitd13ff0559fea73f237a01669887d2c10e11d7662 (patch)
tree427d40cc8b1a89cd4344a8aed539fa75f0cfa5da /include/asm-mips/txx9/tx4927.h
parentf076ab8d048f152b968bb1c6313fed88abb037fe (diff)
parentcb7f39d2bc5a20615d016dd86fca0fd233c13b5d (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (21 commits) [MIPS] Remove unused maltasmp.h. [MIPS] Remove unused saa9730_uart.h. [MIPS] Rename MIPS sys_pipe syscall entry point to something MIPS-specific. [MIPS] 32-bit compat: Delete unused sys_truncate64 and sys_ftruncate64. [MIPS] TXx9: Fix some sparse warnings [MIPS] TXx9: Add 64-bit support [MIPS] TXx9: Cleanups for 64-bit support [MIPS] Cobalt: Fix I/O port resource range [MIPS] don't leak setup_early_printk() in userspace header [MIPS] Remove include/asm-mips/mips-boards/sead{,int}.h [MIPS] Remove asm-mips/mips-boards/atlas{,int}.h [MIPS] mips/sgi-ip22/ip28-berr.c: fix the build [MIPS] TXx9: Miscellaneous build fixes [MIPS] Routerboard 532: Support for base system [MIPS] IP32: Use common SGI button driver [MIPS] IP22: Use common SGI button driver [MIPS] IP22, IP28: Fix merge bug [MIPS] Tinker with constraints in <asm/atomic.h> to fix build error. [MIPS] Add missing prototypes to asm/page.h [MIPS] Fix missing prototypes in asm/fpu.h ...
Diffstat (limited to 'include/asm-mips/txx9/tx4927.h')
-rw-r--r--include/asm-mips/txx9/tx4927.h63
1 files changed, 49 insertions, 14 deletions
diff --git a/include/asm-mips/txx9/tx4927.h b/include/asm-mips/txx9/tx4927.h
index 46d60afc038b..ceb4b79ff4e3 100644
--- a/include/asm-mips/txx9/tx4927.h
+++ b/include/asm-mips/txx9/tx4927.h
@@ -32,32 +32,46 @@
32#include <asm/txx9irq.h> 32#include <asm/txx9irq.h>
33#include <asm/txx9/tx4927pcic.h> 33#include <asm/txx9/tx4927pcic.h>
34 34
35#define TX4927_SDRAMC_REG 0xff1f8000 35#ifdef CONFIG_64BIT
36#define TX4927_EBUSC_REG 0xff1f9000 36#define TX4927_REG_BASE 0xffffffffff1f0000UL
37#define TX4927_PCIC_REG 0xff1fd000 37#else
38#define TX4927_CCFG_REG 0xff1fe000 38#define TX4927_REG_BASE 0xff1f0000UL
39#define TX4927_IRC_REG 0xff1ff600 39#endif
40#define TX4927_REG_SIZE 0x00010000
41
42#define TX4927_SDRAMC_REG (TX4927_REG_BASE + 0x8000)
43#define TX4927_EBUSC_REG (TX4927_REG_BASE + 0x9000)
44#define TX4927_PCIC_REG (TX4927_REG_BASE + 0xd000)
45#define TX4927_CCFG_REG (TX4927_REG_BASE + 0xe000)
46#define TX4927_IRC_REG (TX4927_REG_BASE + 0xf600)
40#define TX4927_NR_TMR 3 47#define TX4927_NR_TMR 3
41#define TX4927_TMR_REG(ch) (0xff1ff000 + (ch) * 0x100) 48#define TX4927_TMR_REG(ch) (TX4927_REG_BASE + 0xf000 + (ch) * 0x100)
49#define TX4927_NR_SIO 2
50#define TX4927_SIO_REG(ch) (TX4927_REG_BASE + 0xf300 + (ch) * 0x100)
51#define TX4927_PIO_REG (TX4927_REG_BASE + 0xf500)
42 52
43#define TX4927_IR_INT(n) (2 + (n)) 53#define TX4927_IR_INT(n) (2 + (n))
44#define TX4927_IR_SIO(n) (8 + (n)) 54#define TX4927_IR_SIO(n) (8 + (n))
45#define TX4927_IR_PCIC 16 55#define TX4927_IR_PCIC 16
56#define TX4927_NUM_IR_TMR 3
57#define TX4927_IR_TMR(n) (17 + (n))
46#define TX4927_IR_PCIERR 22 58#define TX4927_IR_PCIERR 22
47#define TX4927_NUM_IR 32 59#define TX4927_NUM_IR 32
48 60
49#define TX4927_IRC_INT 2 /* IP[2] in Status register */ 61#define TX4927_IRC_INT 2 /* IP[2] in Status register */
50 62
63#define TX4927_NUM_PIO 16
64
51struct tx4927_sdramc_reg { 65struct tx4927_sdramc_reg {
52 volatile unsigned long long cr[4]; 66 u64 cr[4];
53 volatile unsigned long long unused0[4]; 67 u64 unused0[4];
54 volatile unsigned long long tr; 68 u64 tr;
55 volatile unsigned long long unused1[2]; 69 u64 unused1[2];
56 volatile unsigned long long cmd; 70 u64 cmd;
57}; 71};
58 72
59struct tx4927_ebusc_reg { 73struct tx4927_ebusc_reg {
60 volatile unsigned long long cr[8]; 74 u64 cr[8];
61}; 75};
62 76
63struct tx4927_ccfg_reg { 77struct tx4927_ccfg_reg {
@@ -160,12 +174,28 @@ struct tx4927_ccfg_reg {
160#define TX4927_CLKCTR_SIO0RST 0x00000002 174#define TX4927_CLKCTR_SIO0RST 0x00000002
161#define TX4927_CLKCTR_SIO1RST 0x00000001 175#define TX4927_CLKCTR_SIO1RST 0x00000001
162 176
163#define tx4927_sdramcptr ((struct tx4927_sdramc_reg *)TX4927_SDRAMC_REG) 177#define tx4927_sdramcptr \
178 ((struct tx4927_sdramc_reg __iomem *)TX4927_SDRAMC_REG)
164#define tx4927_pcicptr \ 179#define tx4927_pcicptr \
165 ((struct tx4927_pcic_reg __iomem *)TX4927_PCIC_REG) 180 ((struct tx4927_pcic_reg __iomem *)TX4927_PCIC_REG)
166#define tx4927_ccfgptr \ 181#define tx4927_ccfgptr \
167 ((struct tx4927_ccfg_reg __iomem *)TX4927_CCFG_REG) 182 ((struct tx4927_ccfg_reg __iomem *)TX4927_CCFG_REG)
168#define tx4927_ebuscptr ((struct tx4927_ebusc_reg *)TX4927_EBUSC_REG) 183#define tx4927_ebuscptr \
184 ((struct tx4927_ebusc_reg __iomem *)TX4927_EBUSC_REG)
185#define tx4927_pioptr ((struct txx9_pio_reg __iomem *)TX4927_PIO_REG)
186
187#define TX4927_REV_PCODE() \
188 ((__u32)__raw_readq(&tx4927_ccfgptr->crir) >> 16)
189
190#define TX4927_SDRAMC_CR(ch) __raw_readq(&tx4927_sdramcptr->cr[(ch)])
191#define TX4927_SDRAMC_BA(ch) ((TX4927_SDRAMC_CR(ch) >> 49) << 21)
192#define TX4927_SDRAMC_SIZE(ch) \
193 ((((TX4927_SDRAMC_CR(ch) >> 33) & 0x7fff) + 1) << 21)
194
195#define TX4927_EBUSC_CR(ch) __raw_readq(&tx4927_ebuscptr->cr[(ch)])
196#define TX4927_EBUSC_BA(ch) ((TX4927_EBUSC_CR(ch) >> 48) << 20)
197#define TX4927_EBUSC_SIZE(ch) \
198 (0x00100000 << ((unsigned long)(TX4927_EBUSC_CR(ch) >> 8) & 0xf))
169 199
170/* utilities */ 200/* utilities */
171static inline void txx9_clear64(__u64 __iomem *adr, __u64 bits) 201static inline void txx9_clear64(__u64 __iomem *adr, __u64 bits)
@@ -212,6 +242,11 @@ static inline void tx4927_ccfg_change(__u64 change, __u64 new)
212 &tx4927_ccfgptr->ccfg); 242 &tx4927_ccfgptr->ccfg);
213} 243}
214 244
245unsigned int tx4927_get_mem_size(void);
246void tx4927_wdr_init(void);
247void tx4927_setup(void);
248void tx4927_time_init(unsigned int tmrnr);
249void tx4927_setup_serial(void);
215int tx4927_report_pciclk(void); 250int tx4927_report_pciclk(void);
216int tx4927_pciclk66_setup(void); 251int tx4927_pciclk66_setup(void);
217void tx4927_irq_init(void); 252void tx4927_irq_init(void);