[MIPS] TXx9: Reorganize PCI code

Split out PCIC dependent code and SoC dependent code from board dependent
code.  Now TX4927 PCIC code is independent from TX4927/TX4938 SoC code.
Also fix some build problems on CONFIG_PCI=n.

As a bonus, "FPCIB0 Backplane Support" is available for all TX39/TX49 boards
and PCI66 support is available for all TX49 boards.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 4 insertions, 0 deletions

diff --git a/include/asm-mips/txx9/tx3927.h b/include/asm-mips/txx9/tx3927.h
index 63b62d6061f5..ca414c7624e1 100644
--- a/include/asm-mips/txx9/tx3927.h
+++ b/include/asm-mips/txx9/tx3927.h
@@ -316,4 +316,8 @@ struct tx3927_ccfg_reg {
 #define tx3927_sioptr(ch)       ((struct txx927_sio_reg *)TX3927_SIO_REG(ch))
 #define tx3927_pioptr           ((struct txx9_pio_reg __iomem *)TX3927_PIO_REG)
 
+struct pci_controller;
+void __init tx3927_pcic_setup(struct pci_controller *channel,
+                              unsigned long sdram_size, int extarb);
+
 #endif /* __ASM_TXX9_TX3927_H */