diff options
author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2008-07-11 10:27:54 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2008-07-15 13:44:35 -0400 |
commit | edcaf1a6a77315562e9781245cc8e028c9a921dc (patch) | |
tree | a20a0a85071fa283c36db87a41d1a7e091a35781 /include/asm-mips/txx9/rbtx4938.h | |
parent | 766891565bdaf605ea4aebe3e75de77e848254d0 (diff) |
[MIPS] TXx9: Make single kernel can support multiple boards
Make single kernel can be used on RBTX4927/37/38. Also make
some SoC-specific code independent from board-specific code.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/txx9/rbtx4938.h')
-rw-r--r-- | include/asm-mips/txx9/rbtx4938.h | 36 |
1 files changed, 9 insertions, 27 deletions
diff --git a/include/asm-mips/txx9/rbtx4938.h b/include/asm-mips/txx9/rbtx4938.h index 8450f735d056..2f5d5e705a41 100644 --- a/include/asm-mips/txx9/rbtx4938.h +++ b/include/asm-mips/txx9/rbtx4938.h | |||
@@ -101,35 +101,12 @@ | |||
101 | * that particular IRQ on an RBTX4938 machine. Add new 'spaces' as new | 101 | * that particular IRQ on an RBTX4938 machine. Add new 'spaces' as new |
102 | * IRQ hardware is supported. | 102 | * IRQ hardware is supported. |
103 | */ | 103 | */ |
104 | #define RBTX4938_NR_IRQ_LOCAL 8 | ||
105 | #define RBTX4938_NR_IRQ_IRC 32 /* On-Chip IRC */ | ||
106 | #define RBTX4938_NR_IRQ_IOC 8 | 104 | #define RBTX4938_NR_IRQ_IOC 8 |
107 | 105 | ||
108 | #define TX4938_IRQ_CP0_BEG MIPS_CPU_IRQ_BASE | 106 | #define RBTX4938_IRQ_IRC TXX9_IRQ_BASE |
109 | #define TX4938_IRQ_CP0_END (MIPS_CPU_IRQ_BASE + 8 - 1) | 107 | #define RBTX4938_IRQ_IOC (TXX9_IRQ_BASE + TX4938_NUM_IR) |
110 | |||
111 | #define TX4938_IRQ_PIC_BEG TXX9_IRQ_BASE | ||
112 | #define TX4938_IRQ_PIC_END (TXX9_IRQ_BASE + TXx9_MAX_IR - 1) | ||
113 | #define TX4938_IRQ_NEST_EXT_ON_PIC (TX4938_IRQ_PIC_BEG+2) | ||
114 | #define TX4938_IRQ_NEST_PIC_ON_CP0 (TX4938_IRQ_CP0_BEG+2) | ||
115 | #define TX4938_IRQ_USER0 (TX4938_IRQ_CP0_BEG+0) | ||
116 | #define TX4938_IRQ_USER1 (TX4938_IRQ_CP0_BEG+1) | ||
117 | #define TX4938_IRQ_CPU_TIMER (TX4938_IRQ_CP0_BEG+7) | ||
118 | |||
119 | #define TOSHIBA_RBTX4938_IRQ_IOC_RAW_BEG 0 | ||
120 | #define TOSHIBA_RBTX4938_IRQ_IOC_RAW_END 7 | ||
121 | |||
122 | #define TOSHIBA_RBTX4938_IRQ_IOC_BEG ((TX4938_IRQ_PIC_END+1)+TOSHIBA_RBTX4938_IRQ_IOC_RAW_BEG) /* 56 */ | ||
123 | #define TOSHIBA_RBTX4938_IRQ_IOC_END ((TX4938_IRQ_PIC_END+1)+TOSHIBA_RBTX4938_IRQ_IOC_RAW_END) /* 63 */ | ||
124 | #define RBTX4938_IRQ_LOCAL TX4938_IRQ_CP0_BEG | ||
125 | #define RBTX4938_IRQ_IRC (RBTX4938_IRQ_LOCAL + RBTX4938_NR_IRQ_LOCAL) | ||
126 | #define RBTX4938_IRQ_IOC (RBTX4938_IRQ_IRC + RBTX4938_NR_IRQ_IRC) | ||
127 | #define RBTX4938_IRQ_END (RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC) | 108 | #define RBTX4938_IRQ_END (RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC) |
128 | 109 | ||
129 | #define RBTX4938_IRQ_LOCAL_SOFT0 (RBTX4938_IRQ_LOCAL + RBTX4938_SOFT_INT0) | ||
130 | #define RBTX4938_IRQ_LOCAL_SOFT1 (RBTX4938_IRQ_LOCAL + RBTX4938_SOFT_INT1) | ||
131 | #define RBTX4938_IRQ_LOCAL_IRC (RBTX4938_IRQ_LOCAL + RBTX4938_IRC_INT) | ||
132 | #define RBTX4938_IRQ_LOCAL_TIMER (RBTX4938_IRQ_LOCAL + RBTX4938_TIMER_INT) | ||
133 | #define RBTX4938_IRQ_IRC_ECCERR (RBTX4938_IRQ_IRC + TX4938_IR_ECCERR) | 110 | #define RBTX4938_IRQ_IRC_ECCERR (RBTX4938_IRQ_IRC + TX4938_IR_ECCERR) |
134 | #define RBTX4938_IRQ_IRC_WTOERR (RBTX4938_IRQ_IRC + TX4938_IR_WTOERR) | 111 | #define RBTX4938_IRQ_IRC_WTOERR (RBTX4938_IRQ_IRC + TX4938_IR_WTOERR) |
135 | #define RBTX4938_IRQ_IRC_INT(n) (RBTX4938_IRQ_IRC + TX4938_IR_INT(n)) | 112 | #define RBTX4938_IRQ_IRC_INT(n) (RBTX4938_IRQ_IRC + TX4938_IR_INT(n)) |
@@ -157,11 +134,16 @@ | |||
157 | 134 | ||
158 | 135 | ||
159 | /* IOC (PCI, etc) */ | 136 | /* IOC (PCI, etc) */ |
160 | #define RBTX4938_IRQ_IOCINT (TX4938_IRQ_NEST_EXT_ON_PIC) | 137 | #define RBTX4938_IRQ_IOCINT (TXX9_IRQ_BASE + TX4938_IR_INT(0)) |
161 | /* Onboard 10M Ether */ | 138 | /* Onboard 10M Ether */ |
162 | #define RBTX4938_IRQ_ETHER (TX4938_IRQ_NEST_EXT_ON_PIC + 1) | 139 | #define RBTX4938_IRQ_ETHER (TXX9_IRQ_BASE + TX4938_IR_INT(1)) |
163 | 140 | ||
164 | #define RBTX4938_RTL_8019_BASE (RBTX4938_ETHER_ADDR - mips_io_port_base) | 141 | #define RBTX4938_RTL_8019_BASE (RBTX4938_ETHER_ADDR - mips_io_port_base) |
165 | #define RBTX4938_RTL_8019_IRQ (RBTX4938_IRQ_ETHER) | 142 | #define RBTX4938_RTL_8019_IRQ (RBTX4938_IRQ_ETHER) |
166 | 143 | ||
144 | void rbtx4938_prom_init(void); | ||
145 | void rbtx4938_irq_setup(void); | ||
146 | struct pci_dev; | ||
147 | int rbtx4938_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); | ||
148 | |||
167 | #endif /* __ASM_TXX9_RBTX4938_H */ | 149 | #endif /* __ASM_TXX9_RBTX4938_H */ |