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authorLinus Torvalds <torvalds@g5.osdl.org>2006-06-19 22:07:12 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-19 22:07:12 -0400
commit25f42b6af09e34c3f92107b36b5aa6edc2fdba2f (patch)
treee0977d906193eadeafebc442775491b844be79d5 /include/asm-mips/sn/sn0
parent4c84a39c8adba6bf2f829b217e78bfd61478191a (diff)
parent1723b4a34af85447684c9696af83929d2c1e8e6b (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (51 commits) [MIPS] Make timer interrupt frequency configurable from kconfig. [MIPS] Correct HAL2 Kconfig description [MIPS] Fix R4K cache macro names [MIPS] Add Missing R4K Cache Macros to IP27 & IP32 [MIPS] Support for the RM9000-based Basler eXcite smart camera platform. [MIPS] Support for the R5500-based NEC EMMA2RH Mark-eins board [MIPS] Support SNI RM200C SNI in big endian mode and R5000 processors. [MIPS] SN: include asm/sn/types.h for nasid_t. [MIPS] Random fixes for sb1250 [MIPS] Fix bcm1480 compile [MIPS] Remove support for NEC DDB5476. [MIPS] Remove support for NEC DDB5074. [MIPS] Cleanup memory managment initialization. [MIPS] SN: Declare bridge_pci_ops. [MIPS] Remove unused function alloc_pci_controller. [MIPS] IP27: Extract pci_ops into separate file. [MIPS] IP27: Use symbolic constants instead of magic numbers. [MIPS] vr41xx: remove unnecessay items from vr41xx/Kconfig. [MIPS] IP27: Cleanup N/M mode configuration. [MIPS] IP27: Throw away old unused hacks. ...
Diffstat (limited to 'include/asm-mips/sn/sn0')
-rw-r--r--include/asm-mips/sn/sn0/addrs.h87
-rw-r--r--include/asm-mips/sn/sn0/arch.h17
-rw-r--r--include/asm-mips/sn/sn0/hub.h4
-rw-r--r--include/asm-mips/sn/sn0/hubio.h16
-rw-r--r--include/asm-mips/sn/sn0/hubmd.h2
-rw-r--r--include/asm-mips/sn/sn0/hubpi.h18
-rw-r--r--include/asm-mips/sn/sn0/ip27.h9
-rw-r--r--include/asm-mips/sn/sn0/sn0_fru.h44
8 files changed, 11 insertions, 186 deletions
diff --git a/include/asm-mips/sn/sn0/addrs.h b/include/asm-mips/sn/sn0/addrs.h
index 398815639fb8..2c4b758f6736 100644
--- a/include/asm-mips/sn/sn0/addrs.h
+++ b/include/asm-mips/sn/sn0/addrs.h
@@ -49,7 +49,7 @@
49 * so for now we just use defines bracketed by an ifdef. 49 * so for now we just use defines bracketed by an ifdef.
50 */ 50 */
51 51
52#ifdef CONFIG_SGI_SN0_N_MODE 52#ifdef CONFIG_SGI_SN_N_MODE
53 53
54#define NODE_SIZE_BITS 31 54#define NODE_SIZE_BITS 31
55#define BWIN_SIZE_BITS 28 55#define BWIN_SIZE_BITS 28
@@ -63,7 +63,7 @@
63#define BDDIR_UPPER_MASK (UINT64_CAST 0x7ffff << 10) 63#define BDDIR_UPPER_MASK (UINT64_CAST 0x7ffff << 10)
64#define BDECC_UPPER_MASK (UINT64_CAST 0x3ffffff << 3) 64#define BDECC_UPPER_MASK (UINT64_CAST 0x3ffffff << 3)
65 65
66#else /* !defined(CONFIG_SGI_SN0_N_MODE), assume that M-mode is desired */ 66#else /* !defined(CONFIG_SGI_SN_N_MODE), assume that M-mode is desired */
67 67
68#define NODE_SIZE_BITS 32 68#define NODE_SIZE_BITS 32
69#define BWIN_SIZE_BITS 29 69#define BWIN_SIZE_BITS 29
@@ -77,7 +77,7 @@
77#define BDDIR_UPPER_MASK (UINT64_CAST 0xfffff << 10) 77#define BDDIR_UPPER_MASK (UINT64_CAST 0xfffff << 10)
78#define BDECC_UPPER_MASK (UINT64_CAST 0x7ffffff << 3) 78#define BDECC_UPPER_MASK (UINT64_CAST 0x7ffffff << 3)
79 79
80#endif /* !defined(CONFIG_SGI_SN0_N_MODE) */ 80#endif /* !defined(CONFIG_SGI_SN_N_MODE) */
81 81
82#define NODE_ADDRSPACE_SIZE (UINT64_CAST 1 << NODE_SIZE_BITS) 82#define NODE_ADDRSPACE_SIZE (UINT64_CAST 1 << NODE_SIZE_BITS)
83 83
@@ -85,15 +85,15 @@
85#define NASID_GET(_pa) (int) ((UINT64_CAST (_pa) >> \ 85#define NASID_GET(_pa) (int) ((UINT64_CAST (_pa) >> \
86 NASID_SHFT) & NASID_BITMASK) 86 NASID_SHFT) & NASID_BITMASK)
87 87
88#if !defined(__ASSEMBLY__) && !defined(_STANDALONE) 88#if !defined(__ASSEMBLY__)
89 89
90#define NODE_SWIN_BASE(nasid, widget) \ 90#define NODE_SWIN_BASE(nasid, widget) \
91 ((widget == 0) ? NODE_BWIN_BASE((nasid), SWIN0_BIGWIN) \ 91 ((widget == 0) ? NODE_BWIN_BASE((nasid), SWIN0_BIGWIN) \
92 : RAW_NODE_SWIN_BASE(nasid, widget)) 92 : RAW_NODE_SWIN_BASE(nasid, widget))
93#else /* __ASSEMBLY__ || _STANDALONE */ 93#else /* __ASSEMBLY__ */
94#define NODE_SWIN_BASE(nasid, widget) \ 94#define NODE_SWIN_BASE(nasid, widget) \
95 (NODE_IO_BASE(nasid) + (UINT64_CAST (widget) << SWIN_SIZE_BITS)) 95 (NODE_IO_BASE(nasid) + (UINT64_CAST (widget) << SWIN_SIZE_BITS))
96#endif /* __ASSEMBLY__ || _STANDALONE */ 96#endif /* __ASSEMBLY__ */
97 97
98/* 98/*
99 * The following definitions pertain to the IO special address 99 * The following definitions pertain to the IO special address
@@ -143,12 +143,7 @@
143#define SN0_WIDGET_BASE(_nasid, _wid) (NODE_SWIN_BASE((_nasid), (_wid))) 143#define SN0_WIDGET_BASE(_nasid, _wid) (NODE_SWIN_BASE((_nasid), (_wid)))
144 144
145/* Turn on sable logging for the processors whose bits are set. */ 145/* Turn on sable logging for the processors whose bits are set. */
146#ifdef SABLE
147#define SABLE_LOG_TRIGGER(_map) \
148 *((volatile hubreg_t *)(IO_BASE + 0x17ffff0)) = (_map)
149#else
150#define SABLE_LOG_TRIGGER(_map) 146#define SABLE_LOG_TRIGGER(_map)
151#endif /* SABLE */
152 147
153#ifndef __ASSEMBLY__ 148#ifndef __ASSEMBLY__
154#define KERN_NMI_ADDR(nasid, slice) \ 149#define KERN_NMI_ADDR(nasid, slice) \
@@ -281,76 +276,6 @@
281 276
282#define _ARCSPROM 277#define _ARCSPROM
283 278
284#ifdef _STANDALONE
285
286/*
287 * The PROM needs to pass the device base address and the
288 * device pci cfg space address to the device drivers during
289 * install. The COMPONENT->Key field is used for this purpose.
290 * Macros needed by SN0 device drivers to convert the
291 * COMPONENT->Key field to the respective base address.
292 * Key field looks as follows:
293 *
294 * +----------------------------------------------------+
295 * |devnasid | widget |pciid |hubwidid|hstnasid | adap |
296 * | 2 | 1 | 1 | 1 | 2 | 1 |
297 * +----------------------------------------------------+
298 * | | | | | | |
299 * 64 48 40 32 24 8 0
300 *
301 * These are used by standalone drivers till the io infrastructure
302 * is in place.
303 */
304
305#ifndef __ASSEMBLY__
306
307#define uchar unsigned char
308
309#define KEY_DEVNASID_SHFT 48
310#define KEY_WIDID_SHFT 40
311#define KEY_PCIID_SHFT 32
312#define KEY_HUBWID_SHFT 24
313#define KEY_HSTNASID_SHFT 8
314
315#define MK_SN0_KEY(nasid, widid, pciid) \
316 ((((__psunsigned_t)nasid)<< KEY_DEVNASID_SHFT |\
317 ((__psunsigned_t)widid) << KEY_WIDID_SHFT) |\
318 ((__psunsigned_t)pciid) << KEY_PCIID_SHFT)
319
320#define ADD_HUBWID_KEY(key,hubwid)\
321 (key|=((__psunsigned_t)hubwid << KEY_HUBWID_SHFT))
322
323#define ADD_HSTNASID_KEY(key,hstnasid)\
324 (key|=((__psunsigned_t)hstnasid << KEY_HSTNASID_SHFT))
325
326#define GET_DEVNASID_FROM_KEY(key) ((short)(key >> KEY_DEVNASID_SHFT))
327#define GET_WIDID_FROM_KEY(key) ((uchar)(key >> KEY_WIDID_SHFT))
328#define GET_PCIID_FROM_KEY(key) ((uchar)(key >> KEY_PCIID_SHFT))
329#define GET_HUBWID_FROM_KEY(key) ((uchar)(key >> KEY_HUBWID_SHFT))
330#define GET_HSTNASID_FROM_KEY(key) ((short)(key >> KEY_HSTNASID_SHFT))
331
332#define PCI_64_TARGID_SHFT 60
333
334#define GET_PCIBASE_FROM_KEY(key) (NODE_SWIN_BASE(GET_DEVNASID_FROM_KEY(key),\
335 GET_WIDID_FROM_KEY(key))\
336 | BRIDGE_DEVIO(GET_PCIID_FROM_KEY(key)))
337
338#define GET_PCICFGBASE_FROM_KEY(key) \
339 (NODE_SWIN_BASE(GET_DEVNASID_FROM_KEY(key),\
340 GET_WIDID_FROM_KEY(key))\
341 | BRIDGE_TYPE0_CFG_DEV(GET_PCIID_FROM_KEY(key)))
342
343#define GET_WIDBASE_FROM_KEY(key) \
344 (NODE_SWIN_BASE(GET_DEVNASID_FROM_KEY(key),\
345 GET_WIDID_FROM_KEY(key)))
346
347#define PUT_INSTALL_STATUS(c,s) c->Revision = s
348#define GET_INSTALL_STATUS(c) c->Revision
349
350#endif /* !__ASSEMBLY__ */
351
352#endif /* _STANDALONE */
353
354#if defined (HUB_ERR_STS_WAR) 279#if defined (HUB_ERR_STS_WAR)
355 280
356#define ERR_STS_WAR_REGISTER IIO_IIBUSERR 281#define ERR_STS_WAR_REGISTER IIO_IIBUSERR
diff --git a/include/asm-mips/sn/sn0/arch.h b/include/asm-mips/sn/sn0/arch.h
index fb78773a5efe..f7c43fa24aa8 100644
--- a/include/asm-mips/sn/sn0/arch.h
+++ b/include/asm-mips/sn/sn0/arch.h
@@ -13,8 +13,6 @@
13 13
14#include <linux/config.h> 14#include <linux/config.h>
15 15
16#ifndef SABLE
17
18#ifndef SN0XXL /* 128 cpu SMP max */ 16#ifndef SN0XXL /* 128 cpu SMP max */
19/* 17/*
20 * This is the maximum number of nodes that can be part of a kernel. 18 * This is the maximum number of nodes that can be part of a kernel.
@@ -54,25 +52,16 @@
54 */ 52 */
55#define MAX_PARTITIONS MAX_REGIONS 53#define MAX_PARTITIONS MAX_REGIONS
56 54
57
58#else
59
60#define MAX_COMPACT_NODES 4
61#define MAX_NASIDS 4
62#define MAXCPUS 8
63
64#endif
65
66#define NASID_MASK_BYTES ((MAX_NASIDS + 7) / 8) 55#define NASID_MASK_BYTES ((MAX_NASIDS + 7) / 8)
67 56
68/* 57/*
69 * Slot constants for SN0 58 * Slot constants for SN0
70 */ 59 */
71#ifdef CONFIG_SGI_SN0_N_MODE 60#ifdef CONFIG_SGI_SN_N_MODE
72#define MAX_MEM_SLOTS 16 /* max slots per node */ 61#define MAX_MEM_SLOTS 16 /* max slots per node */
73#else /* !CONFIG_SGI_SN0_N_MODE, assume M_MODE */ 62#else /* !CONFIG_SGI_SN_N_MODE, assume CONFIG_SGI_SN_M_MODE */
74#define MAX_MEM_SLOTS 32 /* max slots per node */ 63#define MAX_MEM_SLOTS 32 /* max slots per node */
75#endif /* defined(N_MODE) */ 64#endif /* CONFIG_SGI_SN_M_MODE */
76 65
77#define SLOT_SHIFT (27) 66#define SLOT_SHIFT (27)
78#define SLOT_MIN_MEM_SIZE (32*1024*1024) 67#define SLOT_MIN_MEM_SIZE (32*1024*1024)
diff --git a/include/asm-mips/sn/sn0/hub.h b/include/asm-mips/sn/sn0/hub.h
index f5dbba6f4610..3e228f8e7969 100644
--- a/include/asm-mips/sn/sn0/hub.h
+++ b/include/asm-mips/sn/sn0/hub.h
@@ -31,10 +31,6 @@
31#include <asm/sn/sn0/hubni.h> 31#include <asm/sn/sn0/hubni.h>
32//#include <asm/sn/sn0/hubcore.h> 32//#include <asm/sn/sn0/hubcore.h>
33 33
34#ifdef SABLE
35#define IP27_NO_HUBUART_INT 1
36#endif
37
38/* Translation of uncached attributes */ 34/* Translation of uncached attributes */
39#define UATTR_HSPEC 0 35#define UATTR_HSPEC 0
40#define UATTR_IO 1 36#define UATTR_IO 1
diff --git a/include/asm-mips/sn/sn0/hubio.h b/include/asm-mips/sn/sn0/hubio.h
index f314da21b970..ef91b3363554 100644
--- a/include/asm-mips/sn/sn0/hubio.h
+++ b/include/asm-mips/sn/sn0/hubio.h
@@ -486,22 +486,6 @@ typedef union h1_icrba_u {
486#define ICRBN_A_CERR_SHFT 54 486#define ICRBN_A_CERR_SHFT 54
487#define ICRBN_A_ERR_MASK 0x3ff 487#define ICRBN_A_ERR_MASK 0x3ff
488 488
489#if 0 /* Disabled, this causes namespace polution and break allmodconfig */
490/*
491 * Easy access macros.
492 */
493#define a_error icrba_fields_s.error
494#define a_ecode icrba_fields_s.ecode
495#define a_lnetuce icrba_fields_s.lnetuce
496#define a_mark icrba_fields_s.mark
497#define a_xerr icrba_fields_s.xerr
498#define a_sidn icrba_fields_s.sidn
499#define a_tnum icrba_fields_s.tnum
500#define a_addr icrba_fields_s.addr
501#define a_valid icrba_fields_s.valid
502#define a_iow icrba_fields_s.iow
503#endif
504
505#endif /* !__ASSEMBLY__ */ 489#endif /* !__ASSEMBLY__ */
506 490
507#define IIO_ICRB_ADDR_SHFT 2 /* Shift to get proper address */ 491#define IIO_ICRB_ADDR_SHFT 2 /* Shift to get proper address */
diff --git a/include/asm-mips/sn/sn0/hubmd.h b/include/asm-mips/sn/sn0/hubmd.h
index a66def4e0ba0..1006aa26d771 100644
--- a/include/asm-mips/sn/sn0/hubmd.h
+++ b/include/asm-mips/sn/sn0/hubmd.h
@@ -92,7 +92,7 @@
92#define MD_UREG1_14 0x2200f0 /* uController/UART 1 register */ 92#define MD_UREG1_14 0x2200f0 /* uController/UART 1 register */
93#define MD_UREG1_15 0x2200f8 /* uController/UART 1 register */ 93#define MD_UREG1_15 0x2200f8 /* uController/UART 1 register */
94 94
95#ifdef CONFIG_SGI_SN0_N_MODE 95#ifdef CONFIG_SGI_SN_N_MODE
96#define MD_MEM_BANKS 4 /* 4 banks of memory max in N mode */ 96#define MD_MEM_BANKS 4 /* 4 banks of memory max in N mode */
97#else 97#else
98#define MD_MEM_BANKS 8 /* 8 banks of memory max in M mode */ 98#define MD_MEM_BANKS 8 /* 8 banks of memory max in M mode */
diff --git a/include/asm-mips/sn/sn0/hubpi.h b/include/asm-mips/sn/sn0/hubpi.h
index 355bba8552e3..e39f5f9da040 100644
--- a/include/asm-mips/sn/sn0/hubpi.h
+++ b/include/asm-mips/sn/sn0/hubpi.h
@@ -398,24 +398,6 @@ typedef u64 rtc_time_t;
398 398
399/* PI_RT_FILTER_CTRL mask and shift definitions */ 399/* PI_RT_FILTER_CTRL mask and shift definitions */
400 400
401#if 0
402/*
403 * XXX - This register's definition has changed, but it's only implemented
404 * in Hub 2.
405 */
406#define PRFC_DROP_COUNT_SHFT 27
407#define PRFC_DROP_COUNT_MASK (UINT64_CAST 0x3ff << 27)
408#define PRFC_DROP_CTR_SHFT 18
409#define PRFC_DROP_CTR_MASK (UINT64_CAST 0x1ff << 18)
410#define PRFC_MASK_ENABLE_SHFT 10
411#define PRFC_MASK_ENABLE_MASK (UINT64_CAST 0x7f << 10)
412#define PRFC_MASK_CTR_SHFT 2
413#define PRFC_MASK_CTR_MASK (UINT64_CAST 0xff << 2)
414#define PRFC_OFFSET_SHFT 0
415#define PRFC_OFFSET_MASK (UINT64_CAST 3)
416#endif /* 0 */
417
418
419/* 401/*
420 * Bits for NACK_CNT_A/B and NACK_CMP 402 * Bits for NACK_CNT_A/B and NACK_CMP
421 */ 403 */
diff --git a/include/asm-mips/sn/sn0/ip27.h b/include/asm-mips/sn/sn0/ip27.h
index ade0e974dd78..3c97e0855c8d 100644
--- a/include/asm-mips/sn/sn0/ip27.h
+++ b/include/asm-mips/sn/sn0/ip27.h
@@ -6,7 +6,7 @@
6 * Derived from IRIX <sys/SN/SN0/IP27.h>. 6 * Derived from IRIX <sys/SN/SN0/IP27.h>.
7 * 7 *
8 * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc. 8 * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc.
9 * Copyright (C) 1999 by Ralf Baechle 9 * Copyright (C) 1999, 2006 by Ralf Baechle
10 */ 10 */
11#ifndef _ASM_SN_SN0_IP27_H 11#ifndef _ASM_SN_SN0_IP27_H
12#define _ASM_SN_SN0_IP27_H 12#define _ASM_SN_SN0_IP27_H
@@ -82,11 +82,4 @@
82#define SEND_NMI(_nasid, _slice) \ 82#define SEND_NMI(_nasid, _slice) \
83 REMOTE_HUB_S((_nasid), (PI_NMI_A + ((_slice) * PI_NMI_OFFSET)), 1) 83 REMOTE_HUB_S((_nasid), (PI_NMI_A + ((_slice) * PI_NMI_OFFSET)), 1)
84 84
85/* Sanity hazzard ... Below all the Origin hacks are following. */
86
87#define SN00_BRIDGE 0x9200000008000000
88#define SN00I_BRIDGE0 0x920000000b000000
89#define SN00I_BRIDGE1 0x920000000e000000
90#define SN00I_BRIDGE2 0x920000000f000000
91
92#endif /* _ASM_SN_SN0_IP27_H */ 85#endif /* _ASM_SN_SN0_IP27_H */
diff --git a/include/asm-mips/sn/sn0/sn0_fru.h b/include/asm-mips/sn/sn0/sn0_fru.h
deleted file mode 100644
index 82c6377c275a..000000000000
--- a/include/asm-mips/sn/sn0/sn0_fru.h
+++ /dev/null
@@ -1,44 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Derived from IRIX <sys/SN/SN0/sn0_fru.h>
7 *
8 * Copyright (C) 1992 - 1997, 1999 Silcon Graphics, Inc.
9 * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org)
10 */
11#ifndef _ASM_SN_SN0_SN0_FRU_H
12#define _ASM_SN_SN0_SN0_FRU_H
13
14#define MAX_DIMMS 8 /* max # of dimm banks */
15#define MAX_PCIDEV 8 /* max # of pci devices on a pci bus */
16
17typedef unsigned char confidence_t;
18
19typedef struct kf_mem_s {
20 confidence_t km_confidence; /* confidence level that the memory is bad
21 * is this necessary ?
22 */
23 confidence_t km_dimm[MAX_DIMMS];
24 /* confidence level that dimm[i] is bad
25 *I think this is the right number
26 */
27
28} kf_mem_t;
29
30typedef struct kf_cpu_s {
31 confidence_t kc_confidence; /* confidence level that cpu is bad */
32 confidence_t kc_icache; /* confidence level that instr. cache is bad */
33 confidence_t kc_dcache; /* confidence level that data cache is bad */
34 confidence_t kc_scache; /* confidence level that sec. cache is bad */
35 confidence_t kc_sysbus; /* confidence level that sysad/cmd/state bus is bad */
36} kf_cpu_t;
37
38typedef struct kf_pci_bus_s {
39 confidence_t kpb_belief; /* confidence level that the pci bus is bad */
40 confidence_t kpb_pcidev_belief[MAX_PCIDEV];
41 /* confidence level that the pci dev is bad */
42} kf_pci_bus_t;
43
44#endif /* _ASM_SN_SN0_SN0_FRU_H */