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authorRalf Baechle <ralf@linux-mips.org>2007-10-11 18:46:15 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-10-11 18:46:15 -0400
commit49a89efbbbcc178a39555c43bd59a7593c429664 (patch)
tree93ab78ec340d3f2fe23f9f853edd0bd62dcc64bb /include/asm-mips/sn/sn0/addrs.h
parent10cc3529072d5415fb040018a8a99aa7a60190b6 (diff)
[MIPS] Fix "no space between function name and open parenthesis" warnings.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/sn/sn0/addrs.h')
-rw-r--r--include/asm-mips/sn/sn0/addrs.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/include/asm-mips/sn/sn0/addrs.h b/include/asm-mips/sn/sn0/addrs.h
index 9e8cc52910f6..b06190093bbc 100644
--- a/include/asm-mips/sn/sn0/addrs.h
+++ b/include/asm-mips/sn/sn0/addrs.h
@@ -91,7 +91,7 @@
91 : RAW_NODE_SWIN_BASE(nasid, widget)) 91 : RAW_NODE_SWIN_BASE(nasid, widget))
92#else /* __ASSEMBLY__ */ 92#else /* __ASSEMBLY__ */
93#define NODE_SWIN_BASE(nasid, widget) \ 93#define NODE_SWIN_BASE(nasid, widget) \
94 (NODE_IO_BASE(nasid) + (UINT64_CAST (widget) << SWIN_SIZE_BITS)) 94 (NODE_IO_BASE(nasid) + (UINT64_CAST(widget) << SWIN_SIZE_BITS))
95#endif /* __ASSEMBLY__ */ 95#endif /* __ASSEMBLY__ */
96 96
97/* 97/*
@@ -106,7 +106,7 @@
106#define BWIN_WIDGET_MASK 0x7 106#define BWIN_WIDGET_MASK 0x7
107#define NODE_BWIN_BASE0(nasid) (NODE_IO_BASE(nasid) + BWIN_SIZE) 107#define NODE_BWIN_BASE0(nasid) (NODE_IO_BASE(nasid) + BWIN_SIZE)
108#define NODE_BWIN_BASE(nasid, bigwin) (NODE_BWIN_BASE0(nasid) + \ 108#define NODE_BWIN_BASE(nasid, bigwin) (NODE_BWIN_BASE0(nasid) + \
109 (UINT64_CAST (bigwin) << BWIN_SIZE_BITS)) 109 (UINT64_CAST(bigwin) << BWIN_SIZE_BITS))
110 110
111#define BWIN_WIDGETADDR(addr) ((addr) & BWIN_SIZEMASK) 111#define BWIN_WIDGETADDR(addr) ((addr) & BWIN_SIZEMASK)
112#define BWIN_WINDOWNUM(addr) (((addr) >> BWIN_SIZE_BITS) & BWIN_WIDGET_MASK) 112#define BWIN_WINDOWNUM(addr) (((addr) >> BWIN_SIZE_BITS) & BWIN_WIDGET_MASK)
@@ -259,7 +259,7 @@
259 * CACHE_ERR_SP_PTR could either contain an address to the stack, or 259 * CACHE_ERR_SP_PTR could either contain an address to the stack, or
260 * the stack could start at CACHE_ERR_SP_PTR 260 * the stack could start at CACHE_ERR_SP_PTR
261 */ 261 */
262#if defined (HUB_ERR_STS_WAR) 262#if defined(HUB_ERR_STS_WAR)
263#define CACHE_ERR_EFRAME 0x480 263#define CACHE_ERR_EFRAME 0x480
264#else /* HUB_ERR_STS_WAR */ 264#else /* HUB_ERR_STS_WAR */
265#define CACHE_ERR_EFRAME 0x400 265#define CACHE_ERR_EFRAME 0x400
@@ -275,7 +275,7 @@
275 275
276#define _ARCSPROM 276#define _ARCSPROM
277 277
278#if defined (HUB_ERR_STS_WAR) 278#if defined(HUB_ERR_STS_WAR)
279 279
280#define ERR_STS_WAR_REGISTER IIO_IIBUSERR 280#define ERR_STS_WAR_REGISTER IIO_IIBUSERR
281#define ERR_STS_WAR_ADDR LOCAL_HUB_ADDR(IIO_IIBUSERR) 281#define ERR_STS_WAR_ADDR LOCAL_HUB_ADDR(IIO_IIBUSERR)