diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 18:46:15 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 18:46:15 -0400 |
commit | 21a151d8ca3aa74ee79f9791a9d4dc370d3e0636 (patch) | |
tree | 8556b3a32ded6a49225beb4a7aa4447cc87a0e00 /include/asm-mips/sibyte/sb1250_dma.h | |
parent | 49a89efbbbcc178a39555c43bd59a7593c429664 (diff) |
[MIPS] checkfiles: Fix "need space after that ','" errors.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/sibyte/sb1250_dma.h')
-rw-r--r-- | include/asm-mips/sibyte/sb1250_dma.h | 246 |
1 files changed, 123 insertions, 123 deletions
diff --git a/include/asm-mips/sibyte/sb1250_dma.h b/include/asm-mips/sibyte/sb1250_dma.h index e6145f524fbd..bad56171d747 100644 --- a/include/asm-mips/sibyte/sb1250_dma.h +++ b/include/asm-mips/sibyte/sb1250_dma.h | |||
@@ -57,9 +57,9 @@ | |||
57 | #define M_DMA_RESERVED1 _SB_MAKEMASK1(2) | 57 | #define M_DMA_RESERVED1 _SB_MAKEMASK1(2) |
58 | 58 | ||
59 | #define S_DMA_DESC_TYPE _SB_MAKE64(1) | 59 | #define S_DMA_DESC_TYPE _SB_MAKE64(1) |
60 | #define M_DMA_DESC_TYPE _SB_MAKEMASK(2,S_DMA_DESC_TYPE) | 60 | #define M_DMA_DESC_TYPE _SB_MAKEMASK(2, S_DMA_DESC_TYPE) |
61 | #define V_DMA_DESC_TYPE(x) _SB_MAKEVALUE(x,S_DMA_DESC_TYPE) | 61 | #define V_DMA_DESC_TYPE(x) _SB_MAKEVALUE(x, S_DMA_DESC_TYPE) |
62 | #define G_DMA_DESC_TYPE(x) _SB_GETVALUE(x,S_DMA_DESC_TYPE,M_DMA_DESC_TYPE) | 62 | #define G_DMA_DESC_TYPE(x) _SB_GETVALUE(x, S_DMA_DESC_TYPE, M_DMA_DESC_TYPE) |
63 | 63 | ||
64 | #define K_DMA_DESC_TYPE_RING_AL 0 | 64 | #define K_DMA_DESC_TYPE_RING_AL 0 |
65 | #define K_DMA_DESC_TYPE_CHAIN_AL 1 | 65 | #define K_DMA_DESC_TYPE_CHAIN_AL 1 |
@@ -76,24 +76,24 @@ | |||
76 | #define M_DMA_TDX_EN _SB_MAKEMASK1(7) | 76 | #define M_DMA_TDX_EN _SB_MAKEMASK1(7) |
77 | 77 | ||
78 | #define S_DMA_INT_PKTCNT _SB_MAKE64(8) | 78 | #define S_DMA_INT_PKTCNT _SB_MAKE64(8) |
79 | #define M_DMA_INT_PKTCNT _SB_MAKEMASK(8,S_DMA_INT_PKTCNT) | 79 | #define M_DMA_INT_PKTCNT _SB_MAKEMASK(8, S_DMA_INT_PKTCNT) |
80 | #define V_DMA_INT_PKTCNT(x) _SB_MAKEVALUE(x,S_DMA_INT_PKTCNT) | 80 | #define V_DMA_INT_PKTCNT(x) _SB_MAKEVALUE(x, S_DMA_INT_PKTCNT) |
81 | #define G_DMA_INT_PKTCNT(x) _SB_GETVALUE(x,S_DMA_INT_PKTCNT,M_DMA_INT_PKTCNT) | 81 | #define G_DMA_INT_PKTCNT(x) _SB_GETVALUE(x, S_DMA_INT_PKTCNT, M_DMA_INT_PKTCNT) |
82 | 82 | ||
83 | #define S_DMA_RINGSZ _SB_MAKE64(16) | 83 | #define S_DMA_RINGSZ _SB_MAKE64(16) |
84 | #define M_DMA_RINGSZ _SB_MAKEMASK(16,S_DMA_RINGSZ) | 84 | #define M_DMA_RINGSZ _SB_MAKEMASK(16, S_DMA_RINGSZ) |
85 | #define V_DMA_RINGSZ(x) _SB_MAKEVALUE(x,S_DMA_RINGSZ) | 85 | #define V_DMA_RINGSZ(x) _SB_MAKEVALUE(x, S_DMA_RINGSZ) |
86 | #define G_DMA_RINGSZ(x) _SB_GETVALUE(x,S_DMA_RINGSZ,M_DMA_RINGSZ) | 86 | #define G_DMA_RINGSZ(x) _SB_GETVALUE(x, S_DMA_RINGSZ, M_DMA_RINGSZ) |
87 | 87 | ||
88 | #define S_DMA_HIGH_WATERMARK _SB_MAKE64(32) | 88 | #define S_DMA_HIGH_WATERMARK _SB_MAKE64(32) |
89 | #define M_DMA_HIGH_WATERMARK _SB_MAKEMASK(16,S_DMA_HIGH_WATERMARK) | 89 | #define M_DMA_HIGH_WATERMARK _SB_MAKEMASK(16, S_DMA_HIGH_WATERMARK) |
90 | #define V_DMA_HIGH_WATERMARK(x) _SB_MAKEVALUE(x,S_DMA_HIGH_WATERMARK) | 90 | #define V_DMA_HIGH_WATERMARK(x) _SB_MAKEVALUE(x, S_DMA_HIGH_WATERMARK) |
91 | #define G_DMA_HIGH_WATERMARK(x) _SB_GETVALUE(x,S_DMA_HIGH_WATERMARK,M_DMA_HIGH_WATERMARK) | 91 | #define G_DMA_HIGH_WATERMARK(x) _SB_GETVALUE(x, S_DMA_HIGH_WATERMARK, M_DMA_HIGH_WATERMARK) |
92 | 92 | ||
93 | #define S_DMA_LOW_WATERMARK _SB_MAKE64(48) | 93 | #define S_DMA_LOW_WATERMARK _SB_MAKE64(48) |
94 | #define M_DMA_LOW_WATERMARK _SB_MAKEMASK(16,S_DMA_LOW_WATERMARK) | 94 | #define M_DMA_LOW_WATERMARK _SB_MAKEMASK(16, S_DMA_LOW_WATERMARK) |
95 | #define V_DMA_LOW_WATERMARK(x) _SB_MAKEVALUE(x,S_DMA_LOW_WATERMARK) | 95 | #define V_DMA_LOW_WATERMARK(x) _SB_MAKEVALUE(x, S_DMA_LOW_WATERMARK) |
96 | #define G_DMA_LOW_WATERMARK(x) _SB_GETVALUE(x,S_DMA_LOW_WATERMARK,M_DMA_LOW_WATERMARK) | 96 | #define G_DMA_LOW_WATERMARK(x) _SB_GETVALUE(x, S_DMA_LOW_WATERMARK, M_DMA_LOW_WATERMARK) |
97 | 97 | ||
98 | /* | 98 | /* |
99 | * Ethernet and Serial DMA Configuration Register 1 (Table 7-5) | 99 | * Ethernet and Serial DMA Configuration Register 1 (Table 7-5) |
@@ -116,37 +116,37 @@ | |||
116 | #define M_DMA_TX_FC_PAUSE_EN _SB_MAKEMASK1(7) | 116 | #define M_DMA_TX_FC_PAUSE_EN _SB_MAKEMASK1(7) |
117 | #endif /* 1250 PASS3 || 112x PASS1 || 1480 */ | 117 | #endif /* 1250 PASS3 || 112x PASS1 || 1480 */ |
118 | 118 | ||
119 | #define M_DMA_MBZ1 _SB_MAKEMASK(6,15) | 119 | #define M_DMA_MBZ1 _SB_MAKEMASK(6, 15) |
120 | 120 | ||
121 | #define S_DMA_HDR_SIZE _SB_MAKE64(21) | 121 | #define S_DMA_HDR_SIZE _SB_MAKE64(21) |
122 | #define M_DMA_HDR_SIZE _SB_MAKEMASK(9,S_DMA_HDR_SIZE) | 122 | #define M_DMA_HDR_SIZE _SB_MAKEMASK(9, S_DMA_HDR_SIZE) |
123 | #define V_DMA_HDR_SIZE(x) _SB_MAKEVALUE(x,S_DMA_HDR_SIZE) | 123 | #define V_DMA_HDR_SIZE(x) _SB_MAKEVALUE(x, S_DMA_HDR_SIZE) |
124 | #define G_DMA_HDR_SIZE(x) _SB_GETVALUE(x,S_DMA_HDR_SIZE,M_DMA_HDR_SIZE) | 124 | #define G_DMA_HDR_SIZE(x) _SB_GETVALUE(x, S_DMA_HDR_SIZE, M_DMA_HDR_SIZE) |
125 | 125 | ||
126 | #define M_DMA_MBZ2 _SB_MAKEMASK(5,32) | 126 | #define M_DMA_MBZ2 _SB_MAKEMASK(5, 32) |
127 | 127 | ||
128 | #define S_DMA_ASICXFR_SIZE _SB_MAKE64(37) | 128 | #define S_DMA_ASICXFR_SIZE _SB_MAKE64(37) |
129 | #define M_DMA_ASICXFR_SIZE _SB_MAKEMASK(9,S_DMA_ASICXFR_SIZE) | 129 | #define M_DMA_ASICXFR_SIZE _SB_MAKEMASK(9, S_DMA_ASICXFR_SIZE) |
130 | #define V_DMA_ASICXFR_SIZE(x) _SB_MAKEVALUE(x,S_DMA_ASICXFR_SIZE) | 130 | #define V_DMA_ASICXFR_SIZE(x) _SB_MAKEVALUE(x, S_DMA_ASICXFR_SIZE) |
131 | #define G_DMA_ASICXFR_SIZE(x) _SB_GETVALUE(x,S_DMA_ASICXFR_SIZE,M_DMA_ASICXFR_SIZE) | 131 | #define G_DMA_ASICXFR_SIZE(x) _SB_GETVALUE(x, S_DMA_ASICXFR_SIZE, M_DMA_ASICXFR_SIZE) |
132 | 132 | ||
133 | #define S_DMA_INT_TIMEOUT _SB_MAKE64(48) | 133 | #define S_DMA_INT_TIMEOUT _SB_MAKE64(48) |
134 | #define M_DMA_INT_TIMEOUT _SB_MAKEMASK(16,S_DMA_INT_TIMEOUT) | 134 | #define M_DMA_INT_TIMEOUT _SB_MAKEMASK(16, S_DMA_INT_TIMEOUT) |
135 | #define V_DMA_INT_TIMEOUT(x) _SB_MAKEVALUE(x,S_DMA_INT_TIMEOUT) | 135 | #define V_DMA_INT_TIMEOUT(x) _SB_MAKEVALUE(x, S_DMA_INT_TIMEOUT) |
136 | #define G_DMA_INT_TIMEOUT(x) _SB_GETVALUE(x,S_DMA_INT_TIMEOUT,M_DMA_INT_TIMEOUT) | 136 | #define G_DMA_INT_TIMEOUT(x) _SB_GETVALUE(x, S_DMA_INT_TIMEOUT, M_DMA_INT_TIMEOUT) |
137 | 137 | ||
138 | /* | 138 | /* |
139 | * Ethernet and Serial DMA Descriptor base address (Table 7-6) | 139 | * Ethernet and Serial DMA Descriptor base address (Table 7-6) |
140 | */ | 140 | */ |
141 | 141 | ||
142 | #define M_DMA_DSCRBASE_MBZ _SB_MAKEMASK(4,0) | 142 | #define M_DMA_DSCRBASE_MBZ _SB_MAKEMASK(4, 0) |
143 | 143 | ||
144 | 144 | ||
145 | /* | 145 | /* |
146 | * ASIC Mode Base Address (Table 7-7) | 146 | * ASIC Mode Base Address (Table 7-7) |
147 | */ | 147 | */ |
148 | 148 | ||
149 | #define M_DMA_ASIC_BASE_MBZ _SB_MAKEMASK(20,0) | 149 | #define M_DMA_ASIC_BASE_MBZ _SB_MAKEMASK(20, 0) |
150 | 150 | ||
151 | /* | 151 | /* |
152 | * DMA Descriptor Count Registers (Table 7-8) | 152 | * DMA Descriptor Count Registers (Table 7-8) |
@@ -160,9 +160,9 @@ | |||
160 | */ | 160 | */ |
161 | 161 | ||
162 | #define S_DMA_CURDSCR_ADDR _SB_MAKE64(0) | 162 | #define S_DMA_CURDSCR_ADDR _SB_MAKE64(0) |
163 | #define M_DMA_CURDSCR_ADDR _SB_MAKEMASK(40,S_DMA_CURDSCR_ADDR) | 163 | #define M_DMA_CURDSCR_ADDR _SB_MAKEMASK(40, S_DMA_CURDSCR_ADDR) |
164 | #define S_DMA_CURDSCR_COUNT _SB_MAKE64(40) | 164 | #define S_DMA_CURDSCR_COUNT _SB_MAKE64(40) |
165 | #define M_DMA_CURDSCR_COUNT _SB_MAKEMASK(16,S_DMA_CURDSCR_COUNT) | 165 | #define M_DMA_CURDSCR_COUNT _SB_MAKEMASK(16, S_DMA_CURDSCR_COUNT) |
166 | 166 | ||
167 | #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) | 167 | #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) |
168 | #define M_DMA_TX_CH_PAUSE_ON _SB_MAKEMASK1(56) | 168 | #define M_DMA_TX_CH_PAUSE_ON _SB_MAKEMASK1(56) |
@@ -173,12 +173,12 @@ | |||
173 | */ | 173 | */ |
174 | #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) | 174 | #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) |
175 | #define S_DMA_OODLOST_RX _SB_MAKE64(0) | 175 | #define S_DMA_OODLOST_RX _SB_MAKE64(0) |
176 | #define M_DMA_OODLOST_RX _SB_MAKEMASK(16,S_DMA_OODLOST_RX) | 176 | #define M_DMA_OODLOST_RX _SB_MAKEMASK(16, S_DMA_OODLOST_RX) |
177 | #define G_DMA_OODLOST_RX(x) _SB_GETVALUE(x,S_DMA_OODLOST_RX,M_DMA_OODLOST_RX) | 177 | #define G_DMA_OODLOST_RX(x) _SB_GETVALUE(x, S_DMA_OODLOST_RX, M_DMA_OODLOST_RX) |
178 | 178 | ||
179 | #define S_DMA_EOP_COUNT_RX _SB_MAKE64(16) | 179 | #define S_DMA_EOP_COUNT_RX _SB_MAKE64(16) |
180 | #define M_DMA_EOP_COUNT_RX _SB_MAKEMASK(8,S_DMA_EOP_COUNT_RX) | 180 | #define M_DMA_EOP_COUNT_RX _SB_MAKEMASK(8, S_DMA_EOP_COUNT_RX) |
181 | #define G_DMA_EOP_COUNT_RX(x) _SB_GETVALUE(x,S_DMA_EOP_COUNT_RX,M_DMA_EOP_COUNT_RX) | 181 | #define G_DMA_EOP_COUNT_RX(x) _SB_GETVALUE(x, S_DMA_EOP_COUNT_RX, M_DMA_EOP_COUNT_RX) |
182 | #endif /* 1250 PASS3 || 112x PASS1 || 1480 */ | 182 | #endif /* 1250 PASS3 || 112x PASS1 || 1480 */ |
183 | 183 | ||
184 | /* ********************************************************************* | 184 | /* ********************************************************************* |
@@ -190,39 +190,39 @@ | |||
190 | */ | 190 | */ |
191 | 191 | ||
192 | #define S_DMA_DSCRA_OFFSET _SB_MAKE64(0) | 192 | #define S_DMA_DSCRA_OFFSET _SB_MAKE64(0) |
193 | #define M_DMA_DSCRA_OFFSET _SB_MAKEMASK(5,S_DMA_DSCRA_OFFSET) | 193 | #define M_DMA_DSCRA_OFFSET _SB_MAKEMASK(5, S_DMA_DSCRA_OFFSET) |
194 | #define V_DMA_DSCRA_OFFSET(x) _SB_MAKEVALUE(x,S_DMA_DSCRA_OFFSET) | 194 | #define V_DMA_DSCRA_OFFSET(x) _SB_MAKEVALUE(x, S_DMA_DSCRA_OFFSET) |
195 | #define G_DMA_DSCRA_OFFSET(x) _SB_GETVALUE(x,S_DMA_DSCRA_OFFSET,M_DMA_DSCRA_OFFSET) | 195 | #define G_DMA_DSCRA_OFFSET(x) _SB_GETVALUE(x, S_DMA_DSCRA_OFFSET, M_DMA_DSCRA_OFFSET) |
196 | 196 | ||
197 | /* Note: Don't shift the address over, just mask it with the mask below */ | 197 | /* Note: Don't shift the address over, just mask it with the mask below */ |
198 | #define S_DMA_DSCRA_A_ADDR _SB_MAKE64(5) | 198 | #define S_DMA_DSCRA_A_ADDR _SB_MAKE64(5) |
199 | #define M_DMA_DSCRA_A_ADDR _SB_MAKEMASK(35,S_DMA_DSCRA_A_ADDR) | 199 | #define M_DMA_DSCRA_A_ADDR _SB_MAKEMASK(35, S_DMA_DSCRA_A_ADDR) |
200 | 200 | ||
201 | #define M_DMA_DSCRA_A_ADDR_OFFSET (M_DMA_DSCRA_OFFSET | M_DMA_DSCRA_A_ADDR) | 201 | #define M_DMA_DSCRA_A_ADDR_OFFSET (M_DMA_DSCRA_OFFSET | M_DMA_DSCRA_A_ADDR) |
202 | 202 | ||
203 | #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) | 203 | #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) |
204 | #define S_DMA_DSCRA_A_ADDR_UA _SB_MAKE64(0) | 204 | #define S_DMA_DSCRA_A_ADDR_UA _SB_MAKE64(0) |
205 | #define M_DMA_DSCRA_A_ADDR_UA _SB_MAKEMASK(40,S_DMA_DSCRA_A_ADDR_UA) | 205 | #define M_DMA_DSCRA_A_ADDR_UA _SB_MAKEMASK(40, S_DMA_DSCRA_A_ADDR_UA) |
206 | #endif /* 1250 PASS3 || 112x PASS1 || 1480 */ | 206 | #endif /* 1250 PASS3 || 112x PASS1 || 1480 */ |
207 | 207 | ||
208 | #define S_DMA_DSCRA_A_SIZE _SB_MAKE64(40) | 208 | #define S_DMA_DSCRA_A_SIZE _SB_MAKE64(40) |
209 | #define M_DMA_DSCRA_A_SIZE _SB_MAKEMASK(9,S_DMA_DSCRA_A_SIZE) | 209 | #define M_DMA_DSCRA_A_SIZE _SB_MAKEMASK(9, S_DMA_DSCRA_A_SIZE) |
210 | #define V_DMA_DSCRA_A_SIZE(x) _SB_MAKEVALUE(x,S_DMA_DSCRA_A_SIZE) | 210 | #define V_DMA_DSCRA_A_SIZE(x) _SB_MAKEVALUE(x, S_DMA_DSCRA_A_SIZE) |
211 | #define G_DMA_DSCRA_A_SIZE(x) _SB_GETVALUE(x,S_DMA_DSCRA_A_SIZE,M_DMA_DSCRA_A_SIZE) | 211 | #define G_DMA_DSCRA_A_SIZE(x) _SB_GETVALUE(x, S_DMA_DSCRA_A_SIZE, M_DMA_DSCRA_A_SIZE) |
212 | 212 | ||
213 | #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) | 213 | #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) |
214 | #define S_DMA_DSCRA_DSCR_CNT _SB_MAKE64(40) | 214 | #define S_DMA_DSCRA_DSCR_CNT _SB_MAKE64(40) |
215 | #define M_DMA_DSCRA_DSCR_CNT _SB_MAKEMASK(8,S_DMA_DSCRA_DSCR_CNT) | 215 | #define M_DMA_DSCRA_DSCR_CNT _SB_MAKEMASK(8, S_DMA_DSCRA_DSCR_CNT) |
216 | #define G_DMA_DSCRA_DSCR_CNT(x) _SB_GETVALUE(x,S_DMA_DSCRA_DSCR_CNT,M_DMA_DSCRA_DSCR_CNT) | 216 | #define G_DMA_DSCRA_DSCR_CNT(x) _SB_GETVALUE(x, S_DMA_DSCRA_DSCR_CNT, M_DMA_DSCRA_DSCR_CNT) |
217 | #endif /* 1250 PASS3 || 112x PASS1 || 1480 */ | 217 | #endif /* 1250 PASS3 || 112x PASS1 || 1480 */ |
218 | 218 | ||
219 | #define M_DMA_DSCRA_INTERRUPT _SB_MAKEMASK1(49) | 219 | #define M_DMA_DSCRA_INTERRUPT _SB_MAKEMASK1(49) |
220 | #define M_DMA_DSCRA_OFFSETB _SB_MAKEMASK1(50) | 220 | #define M_DMA_DSCRA_OFFSETB _SB_MAKEMASK1(50) |
221 | 221 | ||
222 | #define S_DMA_DSCRA_STATUS _SB_MAKE64(51) | 222 | #define S_DMA_DSCRA_STATUS _SB_MAKE64(51) |
223 | #define M_DMA_DSCRA_STATUS _SB_MAKEMASK(13,S_DMA_DSCRA_STATUS) | 223 | #define M_DMA_DSCRA_STATUS _SB_MAKEMASK(13, S_DMA_DSCRA_STATUS) |
224 | #define V_DMA_DSCRA_STATUS(x) _SB_MAKEVALUE(x,S_DMA_DSCRA_STATUS) | 224 | #define V_DMA_DSCRA_STATUS(x) _SB_MAKEVALUE(x, S_DMA_DSCRA_STATUS) |
225 | #define G_DMA_DSCRA_STATUS(x) _SB_GETVALUE(x,S_DMA_DSCRA_STATUS,M_DMA_DSCRA_STATUS) | 225 | #define G_DMA_DSCRA_STATUS(x) _SB_GETVALUE(x, S_DMA_DSCRA_STATUS, M_DMA_DSCRA_STATUS) |
226 | 226 | ||
227 | /* | 227 | /* |
228 | * Descriptor doubleword "B" (Table 7-13) | 228 | * Descriptor doubleword "B" (Table 7-13) |
@@ -230,49 +230,49 @@ | |||
230 | 230 | ||
231 | 231 | ||
232 | #define S_DMA_DSCRB_OPTIONS _SB_MAKE64(0) | 232 | #define S_DMA_DSCRB_OPTIONS _SB_MAKE64(0) |
233 | #define M_DMA_DSCRB_OPTIONS _SB_MAKEMASK(4,S_DMA_DSCRB_OPTIONS) | 233 | #define M_DMA_DSCRB_OPTIONS _SB_MAKEMASK(4, S_DMA_DSCRB_OPTIONS) |
234 | #define V_DMA_DSCRB_OPTIONS(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_OPTIONS) | 234 | #define V_DMA_DSCRB_OPTIONS(x) _SB_MAKEVALUE(x, S_DMA_DSCRB_OPTIONS) |
235 | #define G_DMA_DSCRB_OPTIONS(x) _SB_GETVALUE(x,S_DMA_DSCRB_OPTIONS,M_DMA_DSCRB_OPTIONS) | 235 | #define G_DMA_DSCRB_OPTIONS(x) _SB_GETVALUE(x, S_DMA_DSCRB_OPTIONS, M_DMA_DSCRB_OPTIONS) |
236 | 236 | ||
237 | #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) | 237 | #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) |
238 | #define S_DMA_DSCRB_A_SIZE _SB_MAKE64(8) | 238 | #define S_DMA_DSCRB_A_SIZE _SB_MAKE64(8) |
239 | #define M_DMA_DSCRB_A_SIZE _SB_MAKEMASK(14,S_DMA_DSCRB_A_SIZE) | 239 | #define M_DMA_DSCRB_A_SIZE _SB_MAKEMASK(14, S_DMA_DSCRB_A_SIZE) |
240 | #define V_DMA_DSCRB_A_SIZE(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_A_SIZE) | 240 | #define V_DMA_DSCRB_A_SIZE(x) _SB_MAKEVALUE(x, S_DMA_DSCRB_A_SIZE) |
241 | #define G_DMA_DSCRB_A_SIZE(x) _SB_GETVALUE(x,S_DMA_DSCRB_A_SIZE,M_DMA_DSCRB_A_SIZE) | 241 | #define G_DMA_DSCRB_A_SIZE(x) _SB_GETVALUE(x, S_DMA_DSCRB_A_SIZE, M_DMA_DSCRB_A_SIZE) |
242 | #endif /* 1250 PASS3 || 112x PASS1 || 1480 */ | 242 | #endif /* 1250 PASS3 || 112x PASS1 || 1480 */ |
243 | 243 | ||
244 | #define R_DMA_DSCRB_ADDR _SB_MAKE64(0x10) | 244 | #define R_DMA_DSCRB_ADDR _SB_MAKE64(0x10) |
245 | 245 | ||
246 | /* Note: Don't shift the address over, just mask it with the mask below */ | 246 | /* Note: Don't shift the address over, just mask it with the mask below */ |
247 | #define S_DMA_DSCRB_B_ADDR _SB_MAKE64(5) | 247 | #define S_DMA_DSCRB_B_ADDR _SB_MAKE64(5) |
248 | #define M_DMA_DSCRB_B_ADDR _SB_MAKEMASK(35,S_DMA_DSCRB_B_ADDR) | 248 | #define M_DMA_DSCRB_B_ADDR _SB_MAKEMASK(35, S_DMA_DSCRB_B_ADDR) |
249 | 249 | ||
250 | #define S_DMA_DSCRB_B_SIZE _SB_MAKE64(40) | 250 | #define S_DMA_DSCRB_B_SIZE _SB_MAKE64(40) |
251 | #define M_DMA_DSCRB_B_SIZE _SB_MAKEMASK(9,S_DMA_DSCRB_B_SIZE) | 251 | #define M_DMA_DSCRB_B_SIZE _SB_MAKEMASK(9, S_DMA_DSCRB_B_SIZE) |
252 | #define V_DMA_DSCRB_B_SIZE(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_B_SIZE) | 252 | #define V_DMA_DSCRB_B_SIZE(x) _SB_MAKEVALUE(x, S_DMA_DSCRB_B_SIZE) |
253 | #define G_DMA_DSCRB_B_SIZE(x) _SB_GETVALUE(x,S_DMA_DSCRB_B_SIZE,M_DMA_DSCRB_B_SIZE) | 253 | #define G_DMA_DSCRB_B_SIZE(x) _SB_GETVALUE(x, S_DMA_DSCRB_B_SIZE, M_DMA_DSCRB_B_SIZE) |
254 | 254 | ||
255 | #define M_DMA_DSCRB_B_VALID _SB_MAKEMASK1(49) | 255 | #define M_DMA_DSCRB_B_VALID _SB_MAKEMASK1(49) |
256 | 256 | ||
257 | #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) | 257 | #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) |
258 | #define S_DMA_DSCRB_PKT_SIZE_MSB _SB_MAKE64(48) | 258 | #define S_DMA_DSCRB_PKT_SIZE_MSB _SB_MAKE64(48) |
259 | #define M_DMA_DSCRB_PKT_SIZE_MSB _SB_MAKEMASK(2,S_DMA_DSCRB_PKT_SIZE_MSB) | 259 | #define M_DMA_DSCRB_PKT_SIZE_MSB _SB_MAKEMASK(2, S_DMA_DSCRB_PKT_SIZE_MSB) |
260 | #define V_DMA_DSCRB_PKT_SIZE_MSB(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_PKT_SIZE_MSB) | 260 | #define V_DMA_DSCRB_PKT_SIZE_MSB(x) _SB_MAKEVALUE(x, S_DMA_DSCRB_PKT_SIZE_MSB) |
261 | #define G_DMA_DSCRB_PKT_SIZE_MSB(x) _SB_GETVALUE(x,S_DMA_DSCRB_PKT_SIZE_MSB,M_DMA_DSCRB_PKT_SIZE_MSB) | 261 | #define G_DMA_DSCRB_PKT_SIZE_MSB(x) _SB_GETVALUE(x, S_DMA_DSCRB_PKT_SIZE_MSB, M_DMA_DSCRB_PKT_SIZE_MSB) |
262 | #endif /* 1250 PASS3 || 112x PASS1 || 1480 */ | 262 | #endif /* 1250 PASS3 || 112x PASS1 || 1480 */ |
263 | 263 | ||
264 | #define S_DMA_DSCRB_PKT_SIZE _SB_MAKE64(50) | 264 | #define S_DMA_DSCRB_PKT_SIZE _SB_MAKE64(50) |
265 | #define M_DMA_DSCRB_PKT_SIZE _SB_MAKEMASK(14,S_DMA_DSCRB_PKT_SIZE) | 265 | #define M_DMA_DSCRB_PKT_SIZE _SB_MAKEMASK(14, S_DMA_DSCRB_PKT_SIZE) |
266 | #define V_DMA_DSCRB_PKT_SIZE(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_PKT_SIZE) | 266 | #define V_DMA_DSCRB_PKT_SIZE(x) _SB_MAKEVALUE(x, S_DMA_DSCRB_PKT_SIZE) |
267 | #define G_DMA_DSCRB_PKT_SIZE(x) _SB_GETVALUE(x,S_DMA_DSCRB_PKT_SIZE,M_DMA_DSCRB_PKT_SIZE) | 267 | #define G_DMA_DSCRB_PKT_SIZE(x) _SB_GETVALUE(x, S_DMA_DSCRB_PKT_SIZE, M_DMA_DSCRB_PKT_SIZE) |
268 | 268 | ||
269 | /* | 269 | /* |
270 | * from pass2 some bits in dscr_b are also used for rx status | 270 | * from pass2 some bits in dscr_b are also used for rx status |
271 | */ | 271 | */ |
272 | #define S_DMA_DSCRB_STATUS _SB_MAKE64(0) | 272 | #define S_DMA_DSCRB_STATUS _SB_MAKE64(0) |
273 | #define M_DMA_DSCRB_STATUS _SB_MAKEMASK(1,S_DMA_DSCRB_STATUS) | 273 | #define M_DMA_DSCRB_STATUS _SB_MAKEMASK(1, S_DMA_DSCRB_STATUS) |
274 | #define V_DMA_DSCRB_STATUS(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_STATUS) | 274 | #define V_DMA_DSCRB_STATUS(x) _SB_MAKEVALUE(x, S_DMA_DSCRB_STATUS) |
275 | #define G_DMA_DSCRB_STATUS(x) _SB_GETVALUE(x,S_DMA_DSCRB_STATUS,M_DMA_DSCRB_STATUS) | 275 | #define G_DMA_DSCRB_STATUS(x) _SB_GETVALUE(x, S_DMA_DSCRB_STATUS, M_DMA_DSCRB_STATUS) |
276 | 276 | ||
277 | /* | 277 | /* |
278 | * Ethernet Descriptor Status Bits (Table 7-15) | 278 | * Ethernet Descriptor Status Bits (Table 7-15) |
@@ -293,14 +293,14 @@ | |||
293 | #endif /* 1250 PASS3 || 112x PASS1 || 1480 */ | 293 | #endif /* 1250 PASS3 || 112x PASS1 || 1480 */ |
294 | 294 | ||
295 | #define S_DMA_ETHRX_RXCH 53 | 295 | #define S_DMA_ETHRX_RXCH 53 |
296 | #define M_DMA_ETHRX_RXCH _SB_MAKEMASK(2,S_DMA_ETHRX_RXCH) | 296 | #define M_DMA_ETHRX_RXCH _SB_MAKEMASK(2, S_DMA_ETHRX_RXCH) |
297 | #define V_DMA_ETHRX_RXCH(x) _SB_MAKEVALUE(x,S_DMA_ETHRX_RXCH) | 297 | #define V_DMA_ETHRX_RXCH(x) _SB_MAKEVALUE(x, S_DMA_ETHRX_RXCH) |
298 | #define G_DMA_ETHRX_RXCH(x) _SB_GETVALUE(x,S_DMA_ETHRX_RXCH,M_DMA_ETHRX_RXCH) | 298 | #define G_DMA_ETHRX_RXCH(x) _SB_GETVALUE(x, S_DMA_ETHRX_RXCH, M_DMA_ETHRX_RXCH) |
299 | 299 | ||
300 | #define S_DMA_ETHRX_PKTTYPE 55 | 300 | #define S_DMA_ETHRX_PKTTYPE 55 |
301 | #define M_DMA_ETHRX_PKTTYPE _SB_MAKEMASK(3,S_DMA_ETHRX_PKTTYPE) | 301 | #define M_DMA_ETHRX_PKTTYPE _SB_MAKEMASK(3, S_DMA_ETHRX_PKTTYPE) |
302 | #define V_DMA_ETHRX_PKTTYPE(x) _SB_MAKEVALUE(x,S_DMA_ETHRX_PKTTYPE) | 302 | #define V_DMA_ETHRX_PKTTYPE(x) _SB_MAKEVALUE(x, S_DMA_ETHRX_PKTTYPE) |
303 | #define G_DMA_ETHRX_PKTTYPE(x) _SB_GETVALUE(x,S_DMA_ETHRX_PKTTYPE,M_DMA_ETHRX_PKTTYPE) | 303 | #define G_DMA_ETHRX_PKTTYPE(x) _SB_GETVALUE(x, S_DMA_ETHRX_PKTTYPE, M_DMA_ETHRX_PKTTYPE) |
304 | 304 | ||
305 | #define K_DMA_ETHRX_PKTTYPE_IPV4 0 | 305 | #define K_DMA_ETHRX_PKTTYPE_IPV4 0 |
306 | #define K_DMA_ETHRX_PKTTYPE_ARPV4 1 | 306 | #define K_DMA_ETHRX_PKTTYPE_ARPV4 1 |
@@ -385,21 +385,21 @@ | |||
385 | * Register: DM_DSCR_BASE_3 | 385 | * Register: DM_DSCR_BASE_3 |
386 | */ | 386 | */ |
387 | 387 | ||
388 | #define M_DM_DSCR_BASE_MBZ _SB_MAKEMASK(4,0) | 388 | #define M_DM_DSCR_BASE_MBZ _SB_MAKEMASK(4, 0) |
389 | 389 | ||
390 | /* Note: Just mask the base address and then OR it in. */ | 390 | /* Note: Just mask the base address and then OR it in. */ |
391 | #define S_DM_DSCR_BASE_ADDR _SB_MAKE64(4) | 391 | #define S_DM_DSCR_BASE_ADDR _SB_MAKE64(4) |
392 | #define M_DM_DSCR_BASE_ADDR _SB_MAKEMASK(36,S_DM_DSCR_BASE_ADDR) | 392 | #define M_DM_DSCR_BASE_ADDR _SB_MAKEMASK(36, S_DM_DSCR_BASE_ADDR) |
393 | 393 | ||
394 | #define S_DM_DSCR_BASE_RINGSZ _SB_MAKE64(40) | 394 | #define S_DM_DSCR_BASE_RINGSZ _SB_MAKE64(40) |
395 | #define M_DM_DSCR_BASE_RINGSZ _SB_MAKEMASK(16,S_DM_DSCR_BASE_RINGSZ) | 395 | #define M_DM_DSCR_BASE_RINGSZ _SB_MAKEMASK(16, S_DM_DSCR_BASE_RINGSZ) |
396 | #define V_DM_DSCR_BASE_RINGSZ(x) _SB_MAKEVALUE(x,S_DM_DSCR_BASE_RINGSZ) | 396 | #define V_DM_DSCR_BASE_RINGSZ(x) _SB_MAKEVALUE(x, S_DM_DSCR_BASE_RINGSZ) |
397 | #define G_DM_DSCR_BASE_RINGSZ(x) _SB_GETVALUE(x,S_DM_DSCR_BASE_RINGSZ,M_DM_DSCR_BASE_RINGSZ) | 397 | #define G_DM_DSCR_BASE_RINGSZ(x) _SB_GETVALUE(x, S_DM_DSCR_BASE_RINGSZ, M_DM_DSCR_BASE_RINGSZ) |
398 | 398 | ||
399 | #define S_DM_DSCR_BASE_PRIORITY _SB_MAKE64(56) | 399 | #define S_DM_DSCR_BASE_PRIORITY _SB_MAKE64(56) |
400 | #define M_DM_DSCR_BASE_PRIORITY _SB_MAKEMASK(3,S_DM_DSCR_BASE_PRIORITY) | 400 | #define M_DM_DSCR_BASE_PRIORITY _SB_MAKEMASK(3, S_DM_DSCR_BASE_PRIORITY) |
401 | #define V_DM_DSCR_BASE_PRIORITY(x) _SB_MAKEVALUE(x,S_DM_DSCR_BASE_PRIORITY) | 401 | #define V_DM_DSCR_BASE_PRIORITY(x) _SB_MAKEVALUE(x, S_DM_DSCR_BASE_PRIORITY) |
402 | #define G_DM_DSCR_BASE_PRIORITY(x) _SB_GETVALUE(x,S_DM_DSCR_BASE_PRIORITY,M_DM_DSCR_BASE_PRIORITY) | 402 | #define G_DM_DSCR_BASE_PRIORITY(x) _SB_GETVALUE(x, S_DM_DSCR_BASE_PRIORITY, M_DM_DSCR_BASE_PRIORITY) |
403 | 403 | ||
404 | #define K_DM_DSCR_BASE_PRIORITY_1 0 | 404 | #define K_DM_DSCR_BASE_PRIORITY_1 0 |
405 | #define K_DM_DSCR_BASE_PRIORITY_2 1 | 405 | #define K_DM_DSCR_BASE_PRIORITY_2 1 |
@@ -429,12 +429,12 @@ | |||
429 | */ | 429 | */ |
430 | 430 | ||
431 | #define S_DM_CUR_DSCR_DSCR_ADDR _SB_MAKE64(0) | 431 | #define S_DM_CUR_DSCR_DSCR_ADDR _SB_MAKE64(0) |
432 | #define M_DM_CUR_DSCR_DSCR_ADDR _SB_MAKEMASK(40,S_DM_CUR_DSCR_DSCR_ADDR) | 432 | #define M_DM_CUR_DSCR_DSCR_ADDR _SB_MAKEMASK(40, S_DM_CUR_DSCR_DSCR_ADDR) |
433 | 433 | ||
434 | #define S_DM_CUR_DSCR_DSCR_COUNT _SB_MAKE64(48) | 434 | #define S_DM_CUR_DSCR_DSCR_COUNT _SB_MAKE64(48) |
435 | #define M_DM_CUR_DSCR_DSCR_COUNT _SB_MAKEMASK(16,S_DM_CUR_DSCR_DSCR_COUNT) | 435 | #define M_DM_CUR_DSCR_DSCR_COUNT _SB_MAKEMASK(16, S_DM_CUR_DSCR_DSCR_COUNT) |
436 | #define V_DM_CUR_DSCR_DSCR_COUNT(r) _SB_MAKEVALUE(r,S_DM_CUR_DSCR_DSCR_COUNT) | 436 | #define V_DM_CUR_DSCR_DSCR_COUNT(r) _SB_MAKEVALUE(r, S_DM_CUR_DSCR_DSCR_COUNT) |
437 | #define G_DM_CUR_DSCR_DSCR_COUNT(r) _SB_GETVALUE(r,S_DM_CUR_DSCR_DSCR_COUNT,\ | 437 | #define G_DM_CUR_DSCR_DSCR_COUNT(r) _SB_GETVALUE(r, S_DM_CUR_DSCR_DSCR_COUNT,\ |
438 | M_DM_CUR_DSCR_DSCR_COUNT) | 438 | M_DM_CUR_DSCR_DSCR_COUNT) |
439 | 439 | ||
440 | 440 | ||
@@ -447,15 +447,15 @@ | |||
447 | * Register: DM_PARTIAL_3 | 447 | * Register: DM_PARTIAL_3 |
448 | */ | 448 | */ |
449 | #define S_DM_PARTIAL_CRC_PARTIAL _SB_MAKE64(0) | 449 | #define S_DM_PARTIAL_CRC_PARTIAL _SB_MAKE64(0) |
450 | #define M_DM_PARTIAL_CRC_PARTIAL _SB_MAKEMASK(32,S_DM_PARTIAL_CRC_PARTIAL) | 450 | #define M_DM_PARTIAL_CRC_PARTIAL _SB_MAKEMASK(32, S_DM_PARTIAL_CRC_PARTIAL) |
451 | #define V_DM_PARTIAL_CRC_PARTIAL(r) _SB_MAKEVALUE(r,S_DM_PARTIAL_CRC_PARTIAL) | 451 | #define V_DM_PARTIAL_CRC_PARTIAL(r) _SB_MAKEVALUE(r, S_DM_PARTIAL_CRC_PARTIAL) |
452 | #define G_DM_PARTIAL_CRC_PARTIAL(r) _SB_GETVALUE(r,S_DM_PARTIAL_CRC_PARTIAL,\ | 452 | #define G_DM_PARTIAL_CRC_PARTIAL(r) _SB_GETVALUE(r, S_DM_PARTIAL_CRC_PARTIAL,\ |
453 | M_DM_PARTIAL_CRC_PARTIAL) | 453 | M_DM_PARTIAL_CRC_PARTIAL) |
454 | 454 | ||
455 | #define S_DM_PARTIAL_TCPCS_PARTIAL _SB_MAKE64(32) | 455 | #define S_DM_PARTIAL_TCPCS_PARTIAL _SB_MAKE64(32) |
456 | #define M_DM_PARTIAL_TCPCS_PARTIAL _SB_MAKEMASK(16,S_DM_PARTIAL_TCPCS_PARTIAL) | 456 | #define M_DM_PARTIAL_TCPCS_PARTIAL _SB_MAKEMASK(16, S_DM_PARTIAL_TCPCS_PARTIAL) |
457 | #define V_DM_PARTIAL_TCPCS_PARTIAL(r) _SB_MAKEVALUE(r,S_DM_PARTIAL_TCPCS_PARTIAL) | 457 | #define V_DM_PARTIAL_TCPCS_PARTIAL(r) _SB_MAKEVALUE(r, S_DM_PARTIAL_TCPCS_PARTIAL) |
458 | #define G_DM_PARTIAL_TCPCS_PARTIAL(r) _SB_GETVALUE(r,S_DM_PARTIAL_TCPCS_PARTIAL,\ | 458 | #define G_DM_PARTIAL_TCPCS_PARTIAL(r) _SB_GETVALUE(r, S_DM_PARTIAL_TCPCS_PARTIAL,\ |
459 | M_DM_PARTIAL_TCPCS_PARTIAL) | 459 | M_DM_PARTIAL_TCPCS_PARTIAL) |
460 | 460 | ||
461 | #define M_DM_PARTIAL_ODD_BYTE _SB_MAKEMASK1(48) | 461 | #define M_DM_PARTIAL_ODD_BYTE _SB_MAKEMASK1(48) |
@@ -469,15 +469,15 @@ | |||
469 | * Register: CRC_DEF_1 | 469 | * Register: CRC_DEF_1 |
470 | */ | 470 | */ |
471 | #define S_CRC_DEF_CRC_INIT _SB_MAKE64(0) | 471 | #define S_CRC_DEF_CRC_INIT _SB_MAKE64(0) |
472 | #define M_CRC_DEF_CRC_INIT _SB_MAKEMASK(32,S_CRC_DEF_CRC_INIT) | 472 | #define M_CRC_DEF_CRC_INIT _SB_MAKEMASK(32, S_CRC_DEF_CRC_INIT) |
473 | #define V_CRC_DEF_CRC_INIT(r) _SB_MAKEVALUE(r,S_CRC_DEF_CRC_INIT) | 473 | #define V_CRC_DEF_CRC_INIT(r) _SB_MAKEVALUE(r, S_CRC_DEF_CRC_INIT) |
474 | #define G_CRC_DEF_CRC_INIT(r) _SB_GETVALUE(r,S_CRC_DEF_CRC_INIT,\ | 474 | #define G_CRC_DEF_CRC_INIT(r) _SB_GETVALUE(r, S_CRC_DEF_CRC_INIT,\ |
475 | M_CRC_DEF_CRC_INIT) | 475 | M_CRC_DEF_CRC_INIT) |
476 | 476 | ||
477 | #define S_CRC_DEF_CRC_POLY _SB_MAKE64(32) | 477 | #define S_CRC_DEF_CRC_POLY _SB_MAKE64(32) |
478 | #define M_CRC_DEF_CRC_POLY _SB_MAKEMASK(32,S_CRC_DEF_CRC_POLY) | 478 | #define M_CRC_DEF_CRC_POLY _SB_MAKEMASK(32, S_CRC_DEF_CRC_POLY) |
479 | #define V_CRC_DEF_CRC_POLY(r) _SB_MAKEVALUE(r,S_CRC_DEF_CRC_POLY) | 479 | #define V_CRC_DEF_CRC_POLY(r) _SB_MAKEVALUE(r, S_CRC_DEF_CRC_POLY) |
480 | #define G_CRC_DEF_CRC_POLY(r) _SB_GETVALUE(r,S_CRC_DEF_CRC_POLY,\ | 480 | #define G_CRC_DEF_CRC_POLY(r) _SB_GETVALUE(r, S_CRC_DEF_CRC_POLY,\ |
481 | M_CRC_DEF_CRC_POLY) | 481 | M_CRC_DEF_CRC_POLY) |
482 | #endif /* 1250 PASS3 || 112x PASS1 || 1480 */ | 482 | #endif /* 1250 PASS3 || 112x PASS1 || 1480 */ |
483 | 483 | ||
@@ -489,21 +489,21 @@ | |||
489 | * Register: CTCP_DEF_1 | 489 | * Register: CTCP_DEF_1 |
490 | */ | 490 | */ |
491 | #define S_CTCP_DEF_CRC_TXOR _SB_MAKE64(0) | 491 | #define S_CTCP_DEF_CRC_TXOR _SB_MAKE64(0) |
492 | #define M_CTCP_DEF_CRC_TXOR _SB_MAKEMASK(32,S_CTCP_DEF_CRC_TXOR) | 492 | #define M_CTCP_DEF_CRC_TXOR _SB_MAKEMASK(32, S_CTCP_DEF_CRC_TXOR) |
493 | #define V_CTCP_DEF_CRC_TXOR(r) _SB_MAKEVALUE(r,S_CTCP_DEF_CRC_TXOR) | 493 | #define V_CTCP_DEF_CRC_TXOR(r) _SB_MAKEVALUE(r, S_CTCP_DEF_CRC_TXOR) |
494 | #define G_CTCP_DEF_CRC_TXOR(r) _SB_GETVALUE(r,S_CTCP_DEF_CRC_TXOR,\ | 494 | #define G_CTCP_DEF_CRC_TXOR(r) _SB_GETVALUE(r, S_CTCP_DEF_CRC_TXOR,\ |
495 | M_CTCP_DEF_CRC_TXOR) | 495 | M_CTCP_DEF_CRC_TXOR) |
496 | 496 | ||
497 | #define S_CTCP_DEF_TCPCS_INIT _SB_MAKE64(32) | 497 | #define S_CTCP_DEF_TCPCS_INIT _SB_MAKE64(32) |
498 | #define M_CTCP_DEF_TCPCS_INIT _SB_MAKEMASK(16,S_CTCP_DEF_TCPCS_INIT) | 498 | #define M_CTCP_DEF_TCPCS_INIT _SB_MAKEMASK(16, S_CTCP_DEF_TCPCS_INIT) |
499 | #define V_CTCP_DEF_TCPCS_INIT(r) _SB_MAKEVALUE(r,S_CTCP_DEF_TCPCS_INIT) | 499 | #define V_CTCP_DEF_TCPCS_INIT(r) _SB_MAKEVALUE(r, S_CTCP_DEF_TCPCS_INIT) |
500 | #define G_CTCP_DEF_TCPCS_INIT(r) _SB_GETVALUE(r,S_CTCP_DEF_TCPCS_INIT,\ | 500 | #define G_CTCP_DEF_TCPCS_INIT(r) _SB_GETVALUE(r, S_CTCP_DEF_TCPCS_INIT,\ |
501 | M_CTCP_DEF_TCPCS_INIT) | 501 | M_CTCP_DEF_TCPCS_INIT) |
502 | 502 | ||
503 | #define S_CTCP_DEF_CRC_WIDTH _SB_MAKE64(48) | 503 | #define S_CTCP_DEF_CRC_WIDTH _SB_MAKE64(48) |
504 | #define M_CTCP_DEF_CRC_WIDTH _SB_MAKEMASK(2,S_CTCP_DEF_CRC_WIDTH) | 504 | #define M_CTCP_DEF_CRC_WIDTH _SB_MAKEMASK(2, S_CTCP_DEF_CRC_WIDTH) |
505 | #define V_CTCP_DEF_CRC_WIDTH(r) _SB_MAKEVALUE(r,S_CTCP_DEF_CRC_WIDTH) | 505 | #define V_CTCP_DEF_CRC_WIDTH(r) _SB_MAKEVALUE(r, S_CTCP_DEF_CRC_WIDTH) |
506 | #define G_CTCP_DEF_CRC_WIDTH(r) _SB_GETVALUE(r,S_CTCP_DEF_CRC_WIDTH,\ | 506 | #define G_CTCP_DEF_CRC_WIDTH(r) _SB_GETVALUE(r, S_CTCP_DEF_CRC_WIDTH,\ |
507 | M_CTCP_DEF_CRC_WIDTH) | 507 | M_CTCP_DEF_CRC_WIDTH) |
508 | 508 | ||
509 | #define K_CTCP_DEF_CRC_WIDTH_4 0 | 509 | #define K_CTCP_DEF_CRC_WIDTH_4 0 |
@@ -519,7 +519,7 @@ | |||
519 | */ | 519 | */ |
520 | 520 | ||
521 | #define S_DM_DSCRA_DST_ADDR _SB_MAKE64(0) | 521 | #define S_DM_DSCRA_DST_ADDR _SB_MAKE64(0) |
522 | #define M_DM_DSCRA_DST_ADDR _SB_MAKEMASK(40,S_DM_DSCRA_DST_ADDR) | 522 | #define M_DM_DSCRA_DST_ADDR _SB_MAKEMASK(40, S_DM_DSCRA_DST_ADDR) |
523 | 523 | ||
524 | #define M_DM_DSCRA_UN_DEST _SB_MAKEMASK1(40) | 524 | #define M_DM_DSCRA_UN_DEST _SB_MAKEMASK1(40) |
525 | #define M_DM_DSCRA_UN_SRC _SB_MAKEMASK1(41) | 525 | #define M_DM_DSCRA_UN_SRC _SB_MAKEMASK1(41) |
@@ -529,30 +529,30 @@ | |||
529 | #endif /* up to 1250 PASS1 */ | 529 | #endif /* up to 1250 PASS1 */ |
530 | 530 | ||
531 | #define S_DM_DSCRA_DIR_DEST _SB_MAKE64(44) | 531 | #define S_DM_DSCRA_DIR_DEST _SB_MAKE64(44) |
532 | #define M_DM_DSCRA_DIR_DEST _SB_MAKEMASK(2,S_DM_DSCRA_DIR_DEST) | 532 | #define M_DM_DSCRA_DIR_DEST _SB_MAKEMASK(2, S_DM_DSCRA_DIR_DEST) |
533 | #define V_DM_DSCRA_DIR_DEST(x) _SB_MAKEVALUE(x,S_DM_DSCRA_DIR_DEST) | 533 | #define V_DM_DSCRA_DIR_DEST(x) _SB_MAKEVALUE(x, S_DM_DSCRA_DIR_DEST) |
534 | #define G_DM_DSCRA_DIR_DEST(x) _SB_GETVALUE(x,S_DM_DSCRA_DIR_DEST,M_DM_DSCRA_DIR_DEST) | 534 | #define G_DM_DSCRA_DIR_DEST(x) _SB_GETVALUE(x, S_DM_DSCRA_DIR_DEST, M_DM_DSCRA_DIR_DEST) |
535 | 535 | ||
536 | #define K_DM_DSCRA_DIR_DEST_INCR 0 | 536 | #define K_DM_DSCRA_DIR_DEST_INCR 0 |
537 | #define K_DM_DSCRA_DIR_DEST_DECR 1 | 537 | #define K_DM_DSCRA_DIR_DEST_DECR 1 |
538 | #define K_DM_DSCRA_DIR_DEST_CONST 2 | 538 | #define K_DM_DSCRA_DIR_DEST_CONST 2 |
539 | 539 | ||
540 | #define V_DM_DSCRA_DIR_DEST_INCR _SB_MAKEVALUE(K_DM_DSCRA_DIR_DEST_INCR,S_DM_DSCRA_DIR_DEST) | 540 | #define V_DM_DSCRA_DIR_DEST_INCR _SB_MAKEVALUE(K_DM_DSCRA_DIR_DEST_INCR, S_DM_DSCRA_DIR_DEST) |
541 | #define V_DM_DSCRA_DIR_DEST_DECR _SB_MAKEVALUE(K_DM_DSCRA_DIR_DEST_DECR,S_DM_DSCRA_DIR_DEST) | 541 | #define V_DM_DSCRA_DIR_DEST_DECR _SB_MAKEVALUE(K_DM_DSCRA_DIR_DEST_DECR, S_DM_DSCRA_DIR_DEST) |
542 | #define V_DM_DSCRA_DIR_DEST_CONST _SB_MAKEVALUE(K_DM_DSCRA_DIR_DEST_CONST,S_DM_DSCRA_DIR_DEST) | 542 | #define V_DM_DSCRA_DIR_DEST_CONST _SB_MAKEVALUE(K_DM_DSCRA_DIR_DEST_CONST, S_DM_DSCRA_DIR_DEST) |
543 | 543 | ||
544 | #define S_DM_DSCRA_DIR_SRC _SB_MAKE64(46) | 544 | #define S_DM_DSCRA_DIR_SRC _SB_MAKE64(46) |
545 | #define M_DM_DSCRA_DIR_SRC _SB_MAKEMASK(2,S_DM_DSCRA_DIR_SRC) | 545 | #define M_DM_DSCRA_DIR_SRC _SB_MAKEMASK(2, S_DM_DSCRA_DIR_SRC) |
546 | #define V_DM_DSCRA_DIR_SRC(x) _SB_MAKEVALUE(x,S_DM_DSCRA_DIR_SRC) | 546 | #define V_DM_DSCRA_DIR_SRC(x) _SB_MAKEVALUE(x, S_DM_DSCRA_DIR_SRC) |
547 | #define G_DM_DSCRA_DIR_SRC(x) _SB_GETVALUE(x,S_DM_DSCRA_DIR_SRC,M_DM_DSCRA_DIR_SRC) | 547 | #define G_DM_DSCRA_DIR_SRC(x) _SB_GETVALUE(x, S_DM_DSCRA_DIR_SRC, M_DM_DSCRA_DIR_SRC) |
548 | 548 | ||
549 | #define K_DM_DSCRA_DIR_SRC_INCR 0 | 549 | #define K_DM_DSCRA_DIR_SRC_INCR 0 |
550 | #define K_DM_DSCRA_DIR_SRC_DECR 1 | 550 | #define K_DM_DSCRA_DIR_SRC_DECR 1 |
551 | #define K_DM_DSCRA_DIR_SRC_CONST 2 | 551 | #define K_DM_DSCRA_DIR_SRC_CONST 2 |
552 | 552 | ||
553 | #define V_DM_DSCRA_DIR_SRC_INCR _SB_MAKEVALUE(K_DM_DSCRA_DIR_SRC_INCR,S_DM_DSCRA_DIR_SRC) | 553 | #define V_DM_DSCRA_DIR_SRC_INCR _SB_MAKEVALUE(K_DM_DSCRA_DIR_SRC_INCR, S_DM_DSCRA_DIR_SRC) |
554 | #define V_DM_DSCRA_DIR_SRC_DECR _SB_MAKEVALUE(K_DM_DSCRA_DIR_SRC_DECR,S_DM_DSCRA_DIR_SRC) | 554 | #define V_DM_DSCRA_DIR_SRC_DECR _SB_MAKEVALUE(K_DM_DSCRA_DIR_SRC_DECR, S_DM_DSCRA_DIR_SRC) |
555 | #define V_DM_DSCRA_DIR_SRC_CONST _SB_MAKEVALUE(K_DM_DSCRA_DIR_SRC_CONST,S_DM_DSCRA_DIR_SRC) | 555 | #define V_DM_DSCRA_DIR_SRC_CONST _SB_MAKEVALUE(K_DM_DSCRA_DIR_SRC_CONST, S_DM_DSCRA_DIR_SRC) |
556 | 556 | ||
557 | 557 | ||
558 | #define M_DM_DSCRA_ZERO_MEM _SB_MAKEMASK1(48) | 558 | #define M_DM_DSCRA_ZERO_MEM _SB_MAKEMASK1(48) |
@@ -576,19 +576,19 @@ | |||
576 | #define M_DM_DSCRA_CRC_XBIT _SB_MAKEMASK1(61) | 576 | #define M_DM_DSCRA_CRC_XBIT _SB_MAKEMASK1(61) |
577 | #endif /* 1250 PASS3 || 112x PASS1 || 1480 */ | 577 | #endif /* 1250 PASS3 || 112x PASS1 || 1480 */ |
578 | 578 | ||
579 | #define M_DM_DSCRA_RESERVED2 _SB_MAKEMASK(3,61) | 579 | #define M_DM_DSCRA_RESERVED2 _SB_MAKEMASK(3, 61) |
580 | 580 | ||
581 | /* | 581 | /* |
582 | * Data Mover Descriptor Doubleword "B" (Table 7-25) | 582 | * Data Mover Descriptor Doubleword "B" (Table 7-25) |
583 | */ | 583 | */ |
584 | 584 | ||
585 | #define S_DM_DSCRB_SRC_ADDR _SB_MAKE64(0) | 585 | #define S_DM_DSCRB_SRC_ADDR _SB_MAKE64(0) |
586 | #define M_DM_DSCRB_SRC_ADDR _SB_MAKEMASK(40,S_DM_DSCRB_SRC_ADDR) | 586 | #define M_DM_DSCRB_SRC_ADDR _SB_MAKEMASK(40, S_DM_DSCRB_SRC_ADDR) |
587 | 587 | ||
588 | #define S_DM_DSCRB_SRC_LENGTH _SB_MAKE64(40) | 588 | #define S_DM_DSCRB_SRC_LENGTH _SB_MAKE64(40) |
589 | #define M_DM_DSCRB_SRC_LENGTH _SB_MAKEMASK(20,S_DM_DSCRB_SRC_LENGTH) | 589 | #define M_DM_DSCRB_SRC_LENGTH _SB_MAKEMASK(20, S_DM_DSCRB_SRC_LENGTH) |
590 | #define V_DM_DSCRB_SRC_LENGTH(x) _SB_MAKEVALUE(x,S_DM_DSCRB_SRC_LENGTH) | 590 | #define V_DM_DSCRB_SRC_LENGTH(x) _SB_MAKEVALUE(x, S_DM_DSCRB_SRC_LENGTH) |
591 | #define G_DM_DSCRB_SRC_LENGTH(x) _SB_GETVALUE(x,S_DM_DSCRB_SRC_LENGTH,M_DM_DSCRB_SRC_LENGTH) | 591 | #define G_DM_DSCRB_SRC_LENGTH(x) _SB_GETVALUE(x, S_DM_DSCRB_SRC_LENGTH, M_DM_DSCRB_SRC_LENGTH) |
592 | 592 | ||
593 | 593 | ||
594 | #endif | 594 | #endif |