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authorRalf Baechle <ralf@linux-mips.org>2005-05-31 07:49:19 -0400
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 14:31:17 -0400
commite50c0a8fa60da9ac0e0a70caa8a3a803815c1f2f (patch)
tree1928e8b0a4b7fb615e5a9f65dc934ba2e74cb9cd /include/asm-mips/ptrace.h
parent10f650db1bcc193ea07d4f8c2f07315da38ea0c4 (diff)
Support the MIPS32 / MIPS64 DSP ASE.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/ptrace.h')
-rw-r--r--include/asm-mips/ptrace.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/include/asm-mips/ptrace.h b/include/asm-mips/ptrace.h
index 2b5c624c3d4f..8441a5ae96e3 100644
--- a/include/asm-mips/ptrace.h
+++ b/include/asm-mips/ptrace.h
@@ -22,6 +22,8 @@
22#define MMLO 68 22#define MMLO 68
23#define FPC_CSR 69 23#define FPC_CSR 69
24#define FPC_EIR 70 24#define FPC_EIR 70
25#define DSP_BASE 71 /* 3 more hi / lo register pairs */
26#define DSP_CONTROL 77
25 27
26/* 28/*
27 * This struct defines the way the registers are stored on the stack during a 29 * This struct defines the way the registers are stored on the stack during a
@@ -38,8 +40,8 @@ struct pt_regs {
38 40
39 /* Saved special registers. */ 41 /* Saved special registers. */
40 unsigned long cp0_status; 42 unsigned long cp0_status;
41 unsigned long lo;
42 unsigned long hi; 43 unsigned long hi;
44 unsigned long lo;
43 unsigned long cp0_badvaddr; 45 unsigned long cp0_badvaddr;
44 unsigned long cp0_cause; 46 unsigned long cp0_cause;
45 unsigned long cp0_epc; 47 unsigned long cp0_epc;