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authorRalf Baechle <ralf@linux-mips.org>2006-04-05 04:45:47 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-04-18 22:14:28 -0400
commitf088fc84f94c1a36943e28ad704a9a740a35f877 (patch)
tree309add2d3fe666920a681985c36d55f731df9922 /include/asm-mips/processor.h
parent41c594ab65fc89573af296d192aa5235d09717ab (diff)
[MIPS] FPU affinity for MT ASE.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/processor.h')
-rw-r--r--include/asm-mips/processor.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h
index 786651340de1..0fb75f0762e0 100644
--- a/include/asm-mips/processor.h
+++ b/include/asm-mips/processor.h
@@ -134,6 +134,12 @@ struct thread_struct {
134 134
135 /* Saved fpu/fpu emulator stuff. */ 135 /* Saved fpu/fpu emulator stuff. */
136 union mips_fpu_union fpu; 136 union mips_fpu_union fpu;
137#ifdef CONFIG_MIPS_MT_FPAFF
138 /* Emulated instruction count */
139 unsigned long emulated_fp;
140 /* Saved per-thread scheduler affinity mask */
141 cpumask_t user_cpus_allowed;
142#endif /* CONFIG_MIPS_MT_FPAFF */
137 143
138 /* Saved state of the DSP ASE, if available. */ 144 /* Saved state of the DSP ASE, if available. */
139 struct mips_dsp_state dsp; 145 struct mips_dsp_state dsp;
@@ -159,6 +165,12 @@ struct thread_struct {
159#define MF_N32 MF_32BIT_ADDR 165#define MF_N32 MF_32BIT_ADDR
160#define MF_N64 0 166#define MF_N64 0
161 167
168#ifdef CONFIG_MIPS_MT_FPAFF
169#define FPAFF_INIT 0, INIT_CPUMASK,
170#else
171#define FPAFF_INIT
172#endif /* CONFIG_MIPS_MT_FPAFF */
173
162#define INIT_THREAD { \ 174#define INIT_THREAD { \
163 /* \ 175 /* \
164 * saved main processor registers \ 176 * saved main processor registers \
@@ -174,6 +186,10 @@ struct thread_struct {
174 */ \ 186 */ \
175 INIT_FPU, \ 187 INIT_FPU, \
176 /* \ 188 /* \
189 * fpu affinity state (null if not FPAFF) \
190 */ \
191 FPAFF_INIT \
192 /* \
177 * saved dsp/dsp emulator stuff \ 193 * saved dsp/dsp emulator stuff \
178 */ \ 194 */ \
179 INIT_DSP, \ 195 INIT_DSP, \