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authorRalf Baechle <ralf@linux-mips.org>2005-07-06 08:08:11 -0400
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 14:31:37 -0400
commit6e760c8dae7d6c47eff011dd4aad53c94d30494b (patch)
tree141699aef6e0a3b1fef03ec0c5cc8d8958851078 /include/asm-mips/pgtable.h
parentca4973dd559b702e265688e724f356d289b8cd67 (diff)
Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/pgtable.h')
-rw-r--r--include/asm-mips/pgtable.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h
index 754ec6c5a8f7..9f75baf11e25 100644
--- a/include/asm-mips/pgtable.h
+++ b/include/asm-mips/pgtable.h
@@ -82,7 +82,7 @@ extern void paging_init(void);
82#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL)) 82#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL))
83#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT) 83#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
84 84
85#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) 85#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
86static inline void set_pte(pte_t *ptep, pte_t pte) 86static inline void set_pte(pte_t *ptep, pte_t pte)
87{ 87{
88 ptep->pte_high = pte.pte_high; 88 ptep->pte_high = pte.pte_high;
@@ -170,7 +170,7 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
170 * Undefined behaviour if not.. 170 * Undefined behaviour if not..
171 */ 171 */
172static inline int pte_user(pte_t pte) { BUG(); return 0; } 172static inline int pte_user(pte_t pte) { BUG(); return 0; }
173#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) 173#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
174static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_READ; } 174static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_READ; }
175static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_WRITE; } 175static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_WRITE; }
176static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_MODIFIED; } 176static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_MODIFIED; }
@@ -329,7 +329,7 @@ static inline pgprot_t pgprot_noncached(pgprot_t _prot)
329 */ 329 */
330#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) 330#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
331 331
332#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) 332#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
333static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 333static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
334{ 334{
335 pte.pte_low &= _PAGE_CHG_MASK; 335 pte.pte_low &= _PAGE_CHG_MASK;