diff options
author | Chris Dearman <chris@mips.com> | 2007-09-18 19:58:24 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2008-04-28 12:14:25 -0400 |
commit | 351336929ccf222ae38ff0cb7a8dd5fd5c6236a0 (patch) | |
tree | d9e9253bd30cf011d248ad3b63761a9a725e5cb0 /include/asm-mips/pgtable-bits.h | |
parent | bec5052743ec8ae4c5669918cf9b130bf15709a2 (diff) |
[MIPS] Allow setting of the cache attribute at run time.
Slightly tacky, but there is a precedent in the sparc archirecture code.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/pgtable-bits.h')
-rw-r--r-- | include/asm-mips/pgtable-bits.h | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/include/asm-mips/pgtable-bits.h b/include/asm-mips/pgtable-bits.h index 728fbe7b9946..60e2f9338fcd 100644 --- a/include/asm-mips/pgtable-bits.h +++ b/include/asm-mips/pgtable-bits.h | |||
@@ -134,18 +134,6 @@ | |||
134 | 134 | ||
135 | #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED | _CACHE_MASK) | 135 | #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED | _CACHE_MASK) |
136 | 136 | ||
137 | #ifdef CONFIG_MIPS_UNCACHED | ||
138 | #define PAGE_CACHABLE_DEFAULT _CACHE_UNCACHED | ||
139 | #elif defined(CONFIG_DMA_NONCOHERENT) | ||
140 | #define PAGE_CACHABLE_DEFAULT _CACHE_CACHABLE_NONCOHERENT | ||
141 | #elif defined(CONFIG_CPU_RM9000) | ||
142 | #define PAGE_CACHABLE_DEFAULT _CACHE_CWB | ||
143 | #elif defined(CONFIG_SOC_AU1X00) | ||
144 | #define PAGE_CACHABLE_DEFAULT _CACHE_CACHABLE_NONCOHERENT | ||
145 | #else | ||
146 | #define PAGE_CACHABLE_DEFAULT _CACHE_CACHABLE_COW | ||
147 | #endif | ||
148 | |||
149 | #define CONF_CM_DEFAULT (PAGE_CACHABLE_DEFAULT>>_CACHE_SHIFT) | 137 | #define CONF_CM_DEFAULT (PAGE_CACHABLE_DEFAULT>>_CACHE_SHIFT) |
150 | 138 | ||
151 | #endif /* _ASM_PGTABLE_BITS_H */ | 139 | #endif /* _ASM_PGTABLE_BITS_H */ |