Fix compilation, and bring 32/64 bit variants more in line.

Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 3 insertions, 6 deletions

diff --git a/include/asm-mips/pgtable-32.h b/include/asm-mips/pgtable-32.h
index 8d66303eabc4..9b4d39d9f2f0 100644
--- a/include/asm-mips/pgtable-32.h
+++ b/include/asm-mips/pgtable-32.h
@@ -43,10 +43,6 @@ extern int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,
  * works even with the cache aliasing problem the R4k and above have.
  */
 
-/* PMD_SHIFT determines the size of the area a second-level page table can map */
-#define PMD_SIZE        (1UL << PMD_SHIFT)
-#define PMD_MASK        (~(PMD_SIZE-1))
-
 /* PGDIR_SHIFT determines what a third-level page table entry can map */
 #ifdef CONFIG_64BIT_PHYS_ADDR
 #define PGDIR_SHIFT     21
@@ -78,7 +74,7 @@ extern int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,
 #define USER_PTRS_PER_PGD       (0x80000000UL/PGDIR_SIZE)
 #define FIRST_USER_ADDRESS      0
 
-#define VMALLOC_START     KSEG2
+#define VMALLOC_START     MAP_BASE
 
 #ifdef CONFIG_HIGHMEM
 # define VMALLOC_END    (PKMAP_BASE-2*PAGE_SIZE)
@@ -146,12 +142,13 @@ pfn_pte(unsigned long pfn, pgprot_t prot)
 #endif /* defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) */
 
 #define __pgd_offset(address)   pgd_index(address)
+#define __pud_offset(address)   (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
 #define __pmd_offset(address)   (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
 
 /* to find an entry in a kernel page-table-directory */
 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
 
-#define pgd_index(address)      ((address) >> PGDIR_SHIFT)
+#define pgd_index(address)      (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
 
 /* to find an entry in a page-table-directory */
 #define pgd_offset(mm,addr)     ((mm)->pgd + pgd_index(addr))