diff options
| author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2007-07-11 10:30:40 -0400 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-07-12 12:41:10 -0400 |
| commit | 87d43dd48d6e68095be85c4e5f991fd7c89c052e (patch) | |
| tree | bf99b9d1ed24f5f40aa995798418bf11a374975a /include/asm-mips/mipsregs.h | |
| parent | c0cf500145b4154adcbc55afc1a63db24cee84a2 (diff) | |
[MIPS] Change names of local variables to silence sparse (part 2)
This patch is an workaround for these sparse warnings:
include2/asm/mmu_context.h:172:2: warning: symbol 'flags' shadows an earlier one
include2/asm/mmu_context.h:133:16: originally declared here
include2/asm/mmu_context.h:232:2: warning: symbol 'flags' shadows an earlier one
include2/asm/mmu_context.h:203:16: originally declared here
include2/asm/mmu_context.h:277:3: warning: symbol 'flags' shadows an earlier one
include2/asm/mmu_context.h:250:16: originally declared here
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/mipsregs.h')
| -rw-r--r-- | include/asm-mips/mipsregs.h | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h index 706b3691f57e..18f47f1e8cd5 100644 --- a/include/asm-mips/mipsregs.h +++ b/include/asm-mips/mipsregs.h | |||
| @@ -707,10 +707,10 @@ do { \ | |||
| 707 | */ | 707 | */ |
| 708 | #define __read_64bit_c0_split(source, sel) \ | 708 | #define __read_64bit_c0_split(source, sel) \ |
| 709 | ({ \ | 709 | ({ \ |
| 710 | unsigned long long val; \ | 710 | unsigned long long __val; \ |
| 711 | unsigned long flags; \ | 711 | unsigned long __flags; \ |
| 712 | \ | 712 | \ |
| 713 | local_irq_save(flags); \ | 713 | local_irq_save(__flags); \ |
| 714 | if (sel == 0) \ | 714 | if (sel == 0) \ |
| 715 | __asm__ __volatile__( \ | 715 | __asm__ __volatile__( \ |
| 716 | ".set\tmips64\n\t" \ | 716 | ".set\tmips64\n\t" \ |
| @@ -719,7 +719,7 @@ do { \ | |||
| 719 | "dsrl\t%M0, %M0, 32\n\t" \ | 719 | "dsrl\t%M0, %M0, 32\n\t" \ |
| 720 | "dsrl\t%L0, %L0, 32\n\t" \ | 720 | "dsrl\t%L0, %L0, 32\n\t" \ |
| 721 | ".set\tmips0" \ | 721 | ".set\tmips0" \ |
| 722 | : "=r" (val)); \ | 722 | : "=r" (__val)); \ |
| 723 | else \ | 723 | else \ |
| 724 | __asm__ __volatile__( \ | 724 | __asm__ __volatile__( \ |
| 725 | ".set\tmips64\n\t" \ | 725 | ".set\tmips64\n\t" \ |
| @@ -728,17 +728,17 @@ do { \ | |||
| 728 | "dsrl\t%M0, %M0, 32\n\t" \ | 728 | "dsrl\t%M0, %M0, 32\n\t" \ |
| 729 | "dsrl\t%L0, %L0, 32\n\t" \ | 729 | "dsrl\t%L0, %L0, 32\n\t" \ |
| 730 | ".set\tmips0" \ | 730 | ".set\tmips0" \ |
| 731 | : "=r" (val)); \ | 731 | : "=r" (__val)); \ |
| 732 | local_irq_restore(flags); \ | 732 | local_irq_restore(__flags); \ |
| 733 | \ | 733 | \ |
| 734 | val; \ | 734 | __val; \ |
| 735 | }) | 735 | }) |
| 736 | 736 | ||
| 737 | #define __write_64bit_c0_split(source, sel, val) \ | 737 | #define __write_64bit_c0_split(source, sel, val) \ |
| 738 | do { \ | 738 | do { \ |
| 739 | unsigned long flags; \ | 739 | unsigned long __flags; \ |
| 740 | \ | 740 | \ |
| 741 | local_irq_save(flags); \ | 741 | local_irq_save(__flags); \ |
| 742 | if (sel == 0) \ | 742 | if (sel == 0) \ |
| 743 | __asm__ __volatile__( \ | 743 | __asm__ __volatile__( \ |
| 744 | ".set\tmips64\n\t" \ | 744 | ".set\tmips64\n\t" \ |
| @@ -759,7 +759,7 @@ do { \ | |||
| 759 | "dmtc0\t%L0, " #source ", " #sel "\n\t" \ | 759 | "dmtc0\t%L0, " #source ", " #sel "\n\t" \ |
| 760 | ".set\tmips0" \ | 760 | ".set\tmips0" \ |
| 761 | : : "r" (val)); \ | 761 | : : "r" (val)); \ |
| 762 | local_irq_restore(flags); \ | 762 | local_irq_restore(__flags); \ |
| 763 | } while (0) | 763 | } while (0) |
| 764 | 764 | ||
| 765 | #define read_c0_index() __read_32bit_c0_register($0, 0) | 765 | #define read_c0_index() __read_32bit_c0_register($0, 0) |