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authorRalf Baechle <ralf@linux-mips.org>2005-02-06 16:24:55 -0500
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 14:30:25 -0400
commit0efe27617e67448dfe78e7cebde3a6f9eadf1223 (patch)
tree858293ddf2a2e93da4186003ba7de016a073656f /include/asm-mips/mipsregs.h
parentd1e344e500cc693139a69d29122db18190916448 (diff)
Provide functions to access cop0 config4-7 registers
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/mipsregs.h')
-rw-r--r--include/asm-mips/mipsregs.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h
index 2197aa4ce456..006354ed2e29 100644
--- a/include/asm-mips/mipsregs.h
+++ b/include/asm-mips/mipsregs.h
@@ -790,10 +790,18 @@ do { \
790#define read_c0_config1() __read_32bit_c0_register($16, 1) 790#define read_c0_config1() __read_32bit_c0_register($16, 1)
791#define read_c0_config2() __read_32bit_c0_register($16, 2) 791#define read_c0_config2() __read_32bit_c0_register($16, 2)
792#define read_c0_config3() __read_32bit_c0_register($16, 3) 792#define read_c0_config3() __read_32bit_c0_register($16, 3)
793#define read_c0_config4() __read_32bit_c0_register($16, 4)
794#define read_c0_config5() __read_32bit_c0_register($16, 5)
795#define read_c0_config6() __read_32bit_c0_register($16, 6)
796#define read_c0_config7() __read_32bit_c0_register($16, 7)
793#define write_c0_config(val) __write_32bit_c0_register($16, 0, val) 797#define write_c0_config(val) __write_32bit_c0_register($16, 0, val)
794#define write_c0_config1(val) __write_32bit_c0_register($16, 1, val) 798#define write_c0_config1(val) __write_32bit_c0_register($16, 1, val)
795#define write_c0_config2(val) __write_32bit_c0_register($16, 2, val) 799#define write_c0_config2(val) __write_32bit_c0_register($16, 2, val)
796#define write_c0_config3(val) __write_32bit_c0_register($16, 3, val) 800#define write_c0_config3(val) __write_32bit_c0_register($16, 3, val)
801#define write_c0_config4(val) __write_32bit_c0_register($16, 4, val)
802#define write_c0_config5(val) __write_32bit_c0_register($16, 5, val)
803#define write_c0_config6(val) __write_32bit_c0_register($16, 6, val)
804#define write_c0_config7(val) __write_32bit_c0_register($16, 7, val)
797 805
798/* 806/*
799 * The WatchLo register. There may be upto 8 of them. 807 * The WatchLo register. There may be upto 8 of them.