Detect the MIPS R2 vectored interrupt, external interrupt controller

options and the precense of the MT ASE. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
author: Ralf Baechle <ralf@linux-mips.org> 2005-07-14 03:34:18 -0400
committer: Ralf Baechle <ralf@linux-mips.org> 2005-10-29 14:31:51 -0400
commit: 8f40611d2b184ca5d525075d273854929cf8d1d0 (patch)
tree: 962ef8dfa515cee330f506dc4ceac83670d0f84e /include/asm-mips/mipsmtregs.h
parent: 699dbc90e8c7baecae197fb331773f505a46a1eb (diff)
1 files changed, 70 insertions, 48 deletions
diff --git a/include/asm-mips/mipsmtregs.h b/include/asm-mips/mipsmtregs.h
index 9aaefc13a2b3..eda24c2368ad 100644
--- a/include/asm-mips/mipsmtregs.h
+++ b/include/asm-mips/mipsmtregs.h
@@ -175,8 +175,8 @@ static inline unsigned int dvpe(void)
        "       .set    noreorder                                       \n"
        "       .set    noat                                            \n"
        "       .set    mips32r2                                        \n"
-        "       move    $1, %0                                          \n"
        "       .word   0x41610001              # dvpe $1               \n"
+        "       move    %0, $1                                          \n"
        "       ehb                                                     \n"
        "       .set    pop                                             \n"
        : "=r" (res));
@@ -214,12 +214,13 @@ static inline unsigned int dmt(void)
        int res;
        __asm__ __volatile__(
-        "       .set    noreorder                                       \n"
+        "       .set    push                                            \n"
        "       .set    mips32r2                                        \n"
-        "       dmt     %0                                              \n"
+        "       .set    noat                                            \n"
+        "       .word   0x41610BC1                      # dmt $1        \n"
        "       ehb                                                     \n"
-        "       .set mips0                                              \n"
+        "       move    %0, $1                                          \n"
-        "       .set reorder                                            \n"
+        "       .set    pop                                             \n"
        : "=r" (res));
        instruction_hazard();
@@ -251,7 +252,10 @@ static inline void emt(int previous)
 static inline void ehb(void)
 {
-        __asm__ __volatile__("ehb");
+        __asm__ __volatile__(
+        "       .set    mips32r2                                \n"
+        "       ehb                                             \n"
+        "       .set    mips0                                   \n");
 }
 #define mftc0(rt,sel)                                                   \
@@ -259,10 +263,14 @@ static inline void ehb(void)
         unsigned long  __res;                                          \
                                                                        \
        __asm__ __volatile__(                                           \
-         "      .set noat\n\t"                                          \
+        "       .set    push                                    \n"     \
-         "      mftc0\t%0," #rt ", " #sel "\n\t"                        \
+        "       .set    mips32r2                                \n"     \
-         "      .set at\n\t"                                            \
+        "       .set    noat                                    \n"     \
-         : "=r" (__res));                                               \
+        "       # mftc0 $1, $" #rt ", " #sel "                  \n"     \
+        "       .word   0x41000800 | (" #rt " << 16) | " #sel " \n"     \
+        "       move    %0, $1                                  \n"     \
+        "       .set    pop                                     \n"     \
+        : "=r" (__res));                                                \
                                                                        \
        __res;                                                          \
 })
@@ -272,9 +280,10 @@ static inline void ehb(void)
        unsigned long __res;                                            \
                                                                        \
        __asm__ __volatile__(                                           \
-        "       .set    noat                                    \n"     \
+        "       .set    push                                    \n"     \
+        "       .set    mips32r2                                \n"     \
        "       mftgpr  %0," #rt "                              \n"     \
-        "       .set    at                                      \n"     \
+        "       .set    pop                                     \n"     \
        : "=r" (__res));                                                \
                                                                        \
        __res;                                                          \
@@ -294,17 +303,30 @@ static inline void ehb(void)
 })
 #define mttgpr(rd,v)                                                    \
-({                                                                      \
+do {                                                                    \
        __asm__ __volatile__(                                           \
-        "mttgpr %0," #rd                                                \
+        "       .set    push                                    \n"     \
+        "       .set    mips32r2                                \n"     \
+        "       .set    noat                                    \n"     \
+        "       move    $1, %0                                  \n"     \
+        "       # mttgpr $1, " #rd "                            \n"     \
+        "       .word   0x41810020 | (" #rd " << 11)            \n"     \
+        "       .set    pop                                     \n"     \
        : : "r" (v));                                                   \
-})
+} while (0)
 #define mttc0(rd,sel,v)                                                 \
 ({                                                                      \
        __asm__ __volatile__(                                           \
-        "mttc0\t %0," #rd ", " #sel                                     \
+        "       .set    push                                    \n"     \
-        : : "r" (v));                                                   \
+        "       .set    mips32r2                                \n"     \
+        "       .set    noat                                    \n"     \
+        "       move    $1, %0                                  \n"     \
+        "       # mttc0 %0," #rd ", " #sel "                    \n"     \
+        "       .word   0x41810000 | (" #rd " << 11) | " #sel " \n"     \
+        "       .set    pop                                     \n"     \
+        :                                                               \
+        : "r" (v));                                                     \
 })
@@ -324,42 +346,42 @@ do {									\
 /* you *must* set the target tc (settc) before trying to use these */
-#define read_vpe_c0_vpecontrol()        mftc0($1, 1)
+#define read_vpe_c0_vpecontrol()        mftc0(1, 1)
-#define write_vpe_c0_vpecontrol(val)    mttc0($1, 1, val)
+#define write_vpe_c0_vpecontrol(val)    mttc0(1, 1, val)
-#define read_vpe_c0_vpeconf0()          mftc0($1, 2)
+#define read_vpe_c0_vpeconf0()          mftc0(1, 2)
-#define write_vpe_c0_vpeconf0(val)      mttc0($1, 2, val)
+#define write_vpe_c0_vpeconf0(val)      mttc0(1, 2, val)
-#define read_vpe_c0_status()            mftc0($12, 0)
+#define read_vpe_c0_status()            mftc0(12, 0)
-#define write_vpe_c0_status(val)        mttc0($12, 0, val)
+#define write_vpe_c0_status(val)        mttc0(12, 0, val)
-#define read_vpe_c0_cause()             mftc0($13, 0)
+#define read_vpe_c0_cause()             mftc0(13, 0)
-#define write_vpe_c0_cause(val)         mttc0($13, 0, val)
+#define write_vpe_c0_cause(val)         mttc0(13, 0, val)
-#define read_vpe_c0_config()            mftc0($16, 0)
+#define read_vpe_c0_config()            mftc0(16, 0)
-#define write_vpe_c0_config(val)        mttc0($16, 0, val)
+#define write_vpe_c0_config(val)        mttc0(16, 0, val)
-#define read_vpe_c0_config1()           mftc0($16, 1)
+#define read_vpe_c0_config1()           mftc0(16, 1)
-#define write_vpe_c0_config1(val)       mttc0($16, 1, val)
+#define write_vpe_c0_config1(val)       mttc0(16, 1, val)
-#define read_vpe_c0_config7()           mftc0($16, 7)
+#define read_vpe_c0_config7()           mftc0(16, 7)
-#define write_vpe_c0_config7(val)       mttc0($16, 7, val)
+#define write_vpe_c0_config7(val)       mttc0(16, 7, val)
-#define read_vpe_c0_ebase()             mftc0($15,1)
+#define read_vpe_c0_ebase()             mftc0(15,1)
-#define write_vpe_c0_ebase(val)         mttc0($15, 1, val)
+#define write_vpe_c0_ebase(val)         mttc0(15, 1, val)
-#define write_vpe_c0_compare(val)       mttc0($11, 0, val)
+#define write_vpe_c0_compare(val)       mttc0(11, 0, val)
 /* TC */
-#define read_tc_c0_tcstatus()           mftc0($2, 1)
+#define read_tc_c0_tcstatus()           mftc0(2, 1)
-#define write_tc_c0_tcstatus(val)       mttc0($2,1,val)
+#define write_tc_c0_tcstatus(val)       mttc0(2,1,val)
-#define read_tc_c0_tcbind()             mftc0($2, 2)
+#define read_tc_c0_tcbind()             mftc0(2, 2)
-#define write_tc_c0_tcbind(val)         mttc0($2,2,val)
+#define write_tc_c0_tcbind(val)         mttc0(2,2,val)
-#define read_tc_c0_tcrestart()          mftc0($2, 3)
+#define read_tc_c0_tcrestart()          mftc0(2, 3)
-#define write_tc_c0_tcrestart(val)      mttc0($2,3,val)
+#define write_tc_c0_tcrestart(val)      mttc0(2,3,val)
-#define read_tc_c0_tchalt()             mftc0($2, 4)
+#define read_tc_c0_tchalt()             mftc0(2, 4)
-#define write_tc_c0_tchalt(val)         mttc0($2,4,val)
+#define write_tc_c0_tchalt(val)         mttc0(2,4,val)
-#define read_tc_c0_tccontext()          mftc0($2, 5)
+#define read_tc_c0_tccontext()          mftc0(2, 5)
-#define write_tc_c0_tccontext(val)      mttc0($2,5,val)
+#define write_tc_c0_tccontext(val)      mttc0(2,5,val)
 /* GPR */
-#define read_tc_gpr_sp()                mftgpr($29)
+#define read_tc_gpr_sp()                mftgpr(29)
-#define write_tc_gpr_sp(val)            mttgpr($29, val)
+#define write_tc_gpr_sp(val)            mttgpr(29, val)
-#define read_tc_gpr_gp()                mftgpr($28)
+#define read_tc_gpr_gp()                mftgpr(28)
-#define write_tc_gpr_gp(val)            mttgpr($28, val)
+#define write_tc_gpr_gp(val)            mttgpr(28, val)
 #endif /* Not __ASSEMBLY__ */
author	Ralf Baechle <ralf@linux-mips.org>	2005-07-14 03:34:18 -0400
committer	Ralf Baechle <ralf@linux-mips.org>	2005-10-29 14:31:51 -0400
commit	8f40611d2b184ca5d525075d273854929cf8d1d0 (patch)
tree	962ef8dfa515cee330f506dc4ceac83670d0f84e /include/asm-mips/mipsmtregs.h
parent	699dbc90e8c7baecae197fb331773f505a46a1eb (diff)

diff --git a/include/asm-mips/mipsmtregs.h b/include/asm-mips/mipsmtregs.h index 9aaefc13a2b3..eda24c2368ad 100644 --- a/include/asm-mips/mipsmtregs.h +++ b/include/asm-mips/mipsmtregs.h
@@ -175,8 +175,8 @@ static inline unsigned int dvpe(void)
175	" .set noreorder \n"	175	" .set noreorder \n"
176	" .set noat \n"	176	" .set noat \n"
177	" .set mips32r2 \n"	177	" .set mips32r2 \n"
178	" move $1, %0 \n"
179	" .word 0x41610001 # dvpe $1 \n"	178	" .word 0x41610001 # dvpe $1 \n"
		179	" move %0, $1 \n"
180	" ehb \n"	180	" ehb \n"
181	" .set pop \n"	181	" .set pop \n"
182	: "=r" (res));	182	: "=r" (res));
@@ -214,12 +214,13 @@ static inline unsigned int dmt(void)
214	int res;	214	int res;
215		215
216	__asm__ __volatile__(	216	__asm__ __volatile__(
217	" .set noreorder \n"	217	" .set push \n"
218	" .set mips32r2 \n"	218	" .set mips32r2 \n"
219	" dmt %0 \n"	219	" .set noat \n"
		220	" .word 0x41610BC1 # dmt $1 \n"
220	" ehb \n"	221	" ehb \n"
221	" .set mips0 \n"	222	" move %0, $1 \n"
222	" .set reorder \n"	223	" .set pop \n"
223	: "=r" (res));	224	: "=r" (res));
224		225
225	instruction_hazard();	226	instruction_hazard();
@@ -251,7 +252,10 @@ static inline void emt(int previous)
251		252
252	static inline void ehb(void)	253	static inline void ehb(void)
253	{	254	{
254	__asm__ __volatile__("ehb");	255	__asm__ __volatile__(
		256	" .set mips32r2 \n"
		257	" ehb \n"
		258	" .set mips0 \n");
255	}	259	}
256		260
257	#define mftc0(rt,sel) \	261	#define mftc0(rt,sel) \
@@ -259,10 +263,14 @@ static inline void ehb(void)
259	unsigned long __res; \	263	unsigned long __res; \
260	\	264	\
261	__asm__ __volatile__( \	265	__asm__ __volatile__( \
262	" .set noat\n\t" \	266	" .set push \n" \
263	" mftc0\t%0," #rt ", " #sel "\n\t" \	267	" .set mips32r2 \n" \
264	" .set at\n\t" \	268	" .set noat \n" \
265	: "=r" (__res)); \	269	" # mftc0 $1, $" #rt ", " #sel " \n" \
		270	" .word 0x41000800 \| (" #rt " << 16) \| " #sel " \n" \
		271	" move %0, $1 \n" \
		272	" .set pop \n" \
		273	: "=r" (__res)); \
266	\	274	\
267	__res; \	275	__res; \
268	})	276	})
@@ -272,9 +280,10 @@ static inline void ehb(void)
272	unsigned long __res; \	280	unsigned long __res; \
273	\	281	\
274	__asm__ __volatile__( \	282	__asm__ __volatile__( \
275	" .set noat \n" \	283	" .set push \n" \
		284	" .set mips32r2 \n" \
276	" mftgpr %0," #rt " \n" \	285	" mftgpr %0," #rt " \n" \
277	" .set at \n" \	286	" .set pop \n" \
278	: "=r" (__res)); \	287	: "=r" (__res)); \
279	\	288	\
280	__res; \	289	__res; \
@@ -294,17 +303,30 @@ static inline void ehb(void)
294	})	303	})
295		304
296	#define mttgpr(rd,v) \	305	#define mttgpr(rd,v) \
297	({ \	306	do { \
298	__asm__ __volatile__( \	307	__asm__ __volatile__( \
299	"mttgpr %0," #rd \	308	" .set push \n" \
		309	" .set mips32r2 \n" \
		310	" .set noat \n" \
		311	" move $1, %0 \n" \
		312	" # mttgpr $1, " #rd " \n" \
		313	" .word 0x41810020 \| (" #rd " << 11) \n" \
		314	" .set pop \n" \
300	: : "r" (v)); \	315	: : "r" (v)); \
301	})	316	} while (0)
302		317
303	#define mttc0(rd,sel,v) \	318	#define mttc0(rd,sel,v) \
304	({ \	319	({ \
305	__asm__ __volatile__( \	320	__asm__ __volatile__( \
306	"mttc0\t %0," #rd ", " #sel \	321	" .set push \n" \
307	: : "r" (v)); \	322	" .set mips32r2 \n" \
		323	" .set noat \n" \
		324	" move $1, %0 \n" \
		325	" # mttc0 %0," #rd ", " #sel " \n" \
		326	" .word 0x41810000 \| (" #rd " << 11) \| " #sel " \n" \
		327	" .set pop \n" \
		328	: \
		329	: "r" (v)); \
308	})	330	})
309		331
310		332
@@ -324,42 +346,42 @@ do { \
324		346
325		347
326	/* you must set the target tc (settc) before trying to use these */	348	/* you must set the target tc (settc) before trying to use these */
327	#define read_vpe_c0_vpecontrol() mftc0($1, 1)	349	#define read_vpe_c0_vpecontrol() mftc0(1, 1)
328	#define write_vpe_c0_vpecontrol(val) mttc0($1, 1, val)	350	#define write_vpe_c0_vpecontrol(val) mttc0(1, 1, val)
329	#define read_vpe_c0_vpeconf0() mftc0($1, 2)	351	#define read_vpe_c0_vpeconf0() mftc0(1, 2)
330	#define write_vpe_c0_vpeconf0(val) mttc0($1, 2, val)	352	#define write_vpe_c0_vpeconf0(val) mttc0(1, 2, val)
331	#define read_vpe_c0_status() mftc0($12, 0)	353	#define read_vpe_c0_status() mftc0(12, 0)
332	#define write_vpe_c0_status(val) mttc0($12, 0, val)	354	#define write_vpe_c0_status(val) mttc0(12, 0, val)
333	#define read_vpe_c0_cause() mftc0($13, 0)	355	#define read_vpe_c0_cause() mftc0(13, 0)
334	#define write_vpe_c0_cause(val) mttc0($13, 0, val)	356	#define write_vpe_c0_cause(val) mttc0(13, 0, val)
335	#define read_vpe_c0_config() mftc0($16, 0)	357	#define read_vpe_c0_config() mftc0(16, 0)
336	#define write_vpe_c0_config(val) mttc0($16, 0, val)	358	#define write_vpe_c0_config(val) mttc0(16, 0, val)
337	#define read_vpe_c0_config1() mftc0($16, 1)	359	#define read_vpe_c0_config1() mftc0(16, 1)
338	#define write_vpe_c0_config1(val) mttc0($16, 1, val)	360	#define write_vpe_c0_config1(val) mttc0(16, 1, val)
339	#define read_vpe_c0_config7() mftc0($16, 7)	361	#define read_vpe_c0_config7() mftc0(16, 7)
340	#define write_vpe_c0_config7(val) mttc0($16, 7, val)	362	#define write_vpe_c0_config7(val) mttc0(16, 7, val)
341	#define read_vpe_c0_ebase() mftc0($15,1)	363	#define read_vpe_c0_ebase() mftc0(15,1)
342	#define write_vpe_c0_ebase(val) mttc0($15, 1, val)	364	#define write_vpe_c0_ebase(val) mttc0(15, 1, val)
343	#define write_vpe_c0_compare(val) mttc0($11, 0, val)	365	#define write_vpe_c0_compare(val) mttc0(11, 0, val)
344		366
345		367
346	/* TC */	368	/* TC */
347	#define read_tc_c0_tcstatus() mftc0($2, 1)	369	#define read_tc_c0_tcstatus() mftc0(2, 1)
348	#define write_tc_c0_tcstatus(val) mttc0($2,1,val)	370	#define write_tc_c0_tcstatus(val) mttc0(2,1,val)
349	#define read_tc_c0_tcbind() mftc0($2, 2)	371	#define read_tc_c0_tcbind() mftc0(2, 2)
350	#define write_tc_c0_tcbind(val) mttc0($2,2,val)	372	#define write_tc_c0_tcbind(val) mttc0(2,2,val)
351	#define read_tc_c0_tcrestart() mftc0($2, 3)	373	#define read_tc_c0_tcrestart() mftc0(2, 3)
352	#define write_tc_c0_tcrestart(val) mttc0($2,3,val)	374	#define write_tc_c0_tcrestart(val) mttc0(2,3,val)
353	#define read_tc_c0_tchalt() mftc0($2, 4)	375	#define read_tc_c0_tchalt() mftc0(2, 4)
354	#define write_tc_c0_tchalt(val) mttc0($2,4,val)	376	#define write_tc_c0_tchalt(val) mttc0(2,4,val)
355	#define read_tc_c0_tccontext() mftc0($2, 5)	377	#define read_tc_c0_tccontext() mftc0(2, 5)
356	#define write_tc_c0_tccontext(val) mttc0($2,5,val)	378	#define write_tc_c0_tccontext(val) mttc0(2,5,val)
357		379
358	/* GPR */	380	/* GPR */
359	#define read_tc_gpr_sp() mftgpr($29)	381	#define read_tc_gpr_sp() mftgpr(29)
360	#define write_tc_gpr_sp(val) mttgpr($29, val)	382	#define write_tc_gpr_sp(val) mttgpr(29, val)
361	#define read_tc_gpr_gp() mftgpr($28)	383	#define read_tc_gpr_gp() mftgpr(28)
362	#define write_tc_gpr_gp(val) mttgpr($28, val)	384	#define write_tc_gpr_gp(val) mttgpr(28, val)
363		385
364		386
365	#endif /* Not __ASSEMBLY__ */	387	#endif /* Not __ASSEMBLY__ */