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authorRalf Baechle <ralf@linux-mips.org>2007-06-20 17:27:10 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-06-20 17:27:10 -0400
commit3b1d4ed5353af04d6aa20be2701727b9cdb2ac61 (patch)
treee4a3335c925abd933f1650e1ee4786e6bfad8f35 /include/asm-mips/mips-boards/seadint.h
parent7c8545e98468c53809fc06788a3b9a34dff05240 (diff)
[MIPS] Don't drag a platform specific header into generic arch code.
For some platforms it's definitions may conflict. So that's the one-liner. The rest is 10 square kilometers of collateral damage fixup this include used to paper over. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/mips-boards/seadint.h')
-rw-r--r--include/asm-mips/mips-boards/seadint.h7
1 files changed, 0 insertions, 7 deletions
diff --git a/include/asm-mips/mips-boards/seadint.h b/include/asm-mips/mips-boards/seadint.h
index 4f6a3933699d..e710bae07340 100644
--- a/include/asm-mips/mips-boards/seadint.h
+++ b/include/asm-mips/mips-boards/seadint.h
@@ -22,14 +22,7 @@
22 22
23#include <irq.h> 23#include <irq.h>
24 24
25/*
26 * Interrupts 0..7 are used for SEAD CPU interrupts
27 */
28#define MIPSCPU_INT_BASE MIPS_CPU_IRQ_BASE
29
30#define MIPSCPU_INT_UART0 2 25#define MIPSCPU_INT_UART0 2
31#define MIPSCPU_INT_UART1 3 26#define MIPSCPU_INT_UART1 3
32 27
33#define MIPSCPU_INT_CPUCTR 7
34
35#endif /* !(_MIPS_SEADINT_H) */ 28#endif /* !(_MIPS_SEADINT_H) */