diff options
| author | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2006-12-28 12:22:32 -0500 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-02-18 16:31:37 -0500 |
| commit | c066a32a890c50ce59e91f8cea8eb5fd8d5821b9 (patch) | |
| tree | d129af235d11d44c649f0743bc38535c3a229e41 /include/asm-mips/mach-rm | |
| parent | 5759906ca9e5201c3fd40d61c861ec1e441d3a24 (diff) | |
[MIPS] Support for several more SNI RM models.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/mach-rm')
| -rw-r--r-- | include/asm-mips/mach-rm/cpu-feature-overrides.h | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/include/asm-mips/mach-rm/cpu-feature-overrides.h b/include/asm-mips/mach-rm/cpu-feature-overrides.h index 11410ae10d36..7e07283140a3 100644 --- a/include/asm-mips/mach-rm/cpu-feature-overrides.h +++ b/include/asm-mips/mach-rm/cpu-feature-overrides.h | |||
| @@ -21,9 +21,7 @@ | |||
| 21 | #define cpu_has_watch 0 | 21 | #define cpu_has_watch 0 |
| 22 | #define cpu_has_mips16 0 | 22 | #define cpu_has_mips16 0 |
| 23 | #define cpu_has_divec 0 | 23 | #define cpu_has_divec 0 |
| 24 | #define cpu_has_vce 0 | ||
| 25 | #define cpu_has_cache_cdex_p 1 | 24 | #define cpu_has_cache_cdex_p 1 |
| 26 | #define cpu_has_cache_cdex_s 0 | ||
| 27 | #define cpu_has_prefetch 0 | 25 | #define cpu_has_prefetch 0 |
| 28 | #define cpu_has_mcheck 0 | 26 | #define cpu_has_mcheck 0 |
| 29 | #define cpu_has_ejtag 0 | 27 | #define cpu_has_ejtag 0 |
| @@ -35,9 +33,6 @@ | |||
| 35 | #define cpu_has_nofpuex 0 | 33 | #define cpu_has_nofpuex 0 |
| 36 | #define cpu_has_64bits 1 | 34 | #define cpu_has_64bits 1 |
| 37 | 35 | ||
| 38 | #define cpu_dcache_line_size() 32 | ||
| 39 | #define cpu_icache_line_size() 32 | ||
| 40 | |||
| 41 | #define cpu_has_mips32r1 0 | 36 | #define cpu_has_mips32r1 0 |
| 42 | #define cpu_has_mips32r2 0 | 37 | #define cpu_has_mips32r2 0 |
| 43 | #define cpu_has_mips64r1 0 | 38 | #define cpu_has_mips64r1 0 |