diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 18:46:15 -0400 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 18:46:15 -0400 |
commit | 49a89efbbbcc178a39555c43bd59a7593c429664 (patch) | |
tree | 93ab78ec340d3f2fe23f9f853edd0bd62dcc64bb /include/asm-mips/mach-pb1x00/pb1000.h | |
parent | 10cc3529072d5415fb040018a8a99aa7a60190b6 (diff) |
[MIPS] Fix "no space between function name and open parenthesis" warnings.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/mach-pb1x00/pb1000.h')
-rw-r--r-- | include/asm-mips/mach-pb1x00/pb1000.h | 56 |
1 files changed, 28 insertions, 28 deletions
diff --git a/include/asm-mips/mach-pb1x00/pb1000.h b/include/asm-mips/mach-pb1x00/pb1000.h index 50c1e413a688..b52e0e7ee3fb 100644 --- a/include/asm-mips/mach-pb1x00/pb1000.h +++ b/include/asm-mips/mach-pb1x00/pb1000.h | |||
@@ -32,38 +32,38 @@ | |||
32 | #define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1) | 32 | #define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1) |
33 | 33 | ||
34 | #define PB1000_PCR 0xBE000000 | 34 | #define PB1000_PCR 0xBE000000 |
35 | #define PCR_SLOT_0_VPP0 (1<<0) | 35 | # define PCR_SLOT_0_VPP0 (1<<0) |
36 | #define PCR_SLOT_0_VPP1 (1<<1) | 36 | # define PCR_SLOT_0_VPP1 (1<<1) |
37 | #define PCR_SLOT_0_VCC0 (1<<2) | 37 | # define PCR_SLOT_0_VCC0 (1<<2) |
38 | #define PCR_SLOT_0_VCC1 (1<<3) | 38 | # define PCR_SLOT_0_VCC1 (1<<3) |
39 | #define PCR_SLOT_0_RST (1<<4) | 39 | # define PCR_SLOT_0_RST (1<<4) |
40 | 40 | ||
41 | #define PCR_SLOT_1_VPP0 (1<<8) | 41 | # define PCR_SLOT_1_VPP0 (1<<8) |
42 | #define PCR_SLOT_1_VPP1 (1<<9) | 42 | # define PCR_SLOT_1_VPP1 (1<<9) |
43 | #define PCR_SLOT_1_VCC0 (1<<10) | 43 | # define PCR_SLOT_1_VCC0 (1<<10) |
44 | #define PCR_SLOT_1_VCC1 (1<<11) | 44 | # define PCR_SLOT_1_VCC1 (1<<11) |
45 | #define PCR_SLOT_1_RST (1<<12) | 45 | # define PCR_SLOT_1_RST (1<<12) |
46 | 46 | ||
47 | #define PB1000_MDR 0xBE000004 | 47 | #define PB1000_MDR 0xBE000004 |
48 | #define MDR_PI (1<<5) /* pcmcia int latch */ | 48 | # define MDR_PI (1<<5) /* pcmcia int latch */ |
49 | #define MDR_EPI (1<<14) /* enable pcmcia int */ | 49 | # define MDR_EPI (1<<14) /* enable pcmcia int */ |
50 | #define MDR_CPI (1<<15) /* clear pcmcia int */ | 50 | # define MDR_CPI (1<<15) /* clear pcmcia int */ |
51 | 51 | ||
52 | #define PB1000_ACR1 0xBE000008 | 52 | #define PB1000_ACR1 0xBE000008 |
53 | #define ACR1_SLOT_0_CD1 (1<<0) /* card detect 1 */ | 53 | # define ACR1_SLOT_0_CD1 (1<<0) /* card detect 1 */ |
54 | #define ACR1_SLOT_0_CD2 (1<<1) /* card detect 2 */ | 54 | # define ACR1_SLOT_0_CD2 (1<<1) /* card detect 2 */ |
55 | #define ACR1_SLOT_0_READY (1<<2) /* ready */ | 55 | # define ACR1_SLOT_0_READY (1<<2) /* ready */ |
56 | #define ACR1_SLOT_0_STATUS (1<<3) /* status change */ | 56 | # define ACR1_SLOT_0_STATUS (1<<3) /* status change */ |
57 | #define ACR1_SLOT_0_VS1 (1<<4) /* voltage sense 1 */ | 57 | # define ACR1_SLOT_0_VS1 (1<<4) /* voltage sense 1 */ |
58 | #define ACR1_SLOT_0_VS2 (1<<5) /* voltage sense 2 */ | 58 | # define ACR1_SLOT_0_VS2 (1<<5) /* voltage sense 2 */ |
59 | #define ACR1_SLOT_0_INPACK (1<<6) /* inpack pin status */ | 59 | # define ACR1_SLOT_0_INPACK (1<<6) /* inpack pin status */ |
60 | #define ACR1_SLOT_1_CD1 (1<<8) /* card detect 1 */ | 60 | # define ACR1_SLOT_1_CD1 (1<<8) /* card detect 1 */ |
61 | #define ACR1_SLOT_1_CD2 (1<<9) /* card detect 2 */ | 61 | # define ACR1_SLOT_1_CD2 (1<<9) /* card detect 2 */ |
62 | #define ACR1_SLOT_1_READY (1<<10) /* ready */ | 62 | # define ACR1_SLOT_1_READY (1<<10) /* ready */ |
63 | #define ACR1_SLOT_1_STATUS (1<<11) /* status change */ | 63 | # define ACR1_SLOT_1_STATUS (1<<11) /* status change */ |
64 | #define ACR1_SLOT_1_VS1 (1<<12) /* voltage sense 1 */ | 64 | # define ACR1_SLOT_1_VS1 (1<<12) /* voltage sense 1 */ |
65 | #define ACR1_SLOT_1_VS2 (1<<13) /* voltage sense 2 */ | 65 | # define ACR1_SLOT_1_VS2 (1<<13) /* voltage sense 2 */ |
66 | #define ACR1_SLOT_1_INPACK (1<<14) /* inpack pin status */ | 66 | # define ACR1_SLOT_1_INPACK (1<<14) /* inpack pin status */ |
67 | 67 | ||
68 | #define CPLD_AUX0 0xBE00000C | 68 | #define CPLD_AUX0 0xBE00000C |
69 | #define CPLD_AUX1 0xBE000010 | 69 | #define CPLD_AUX1 0xBE000010 |