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authorLinus Torvalds <torvalds@g5.osdl.org>2005-10-29 15:19:15 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2005-10-29 15:19:15 -0400
commite9d52234e35b27ea4ea5f2ab64ca47b1a0c740ab (patch)
tree318d37a7d55c79e6f7d86163fb28e0eccbb0fe83 /include/asm-mips/mach-ip22
parent955c5038823748e529a49f0e33ab635d92843500 (diff)
parent09af7b443c257460d45cb6c1896d29f173fef35b (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
Diffstat (limited to 'include/asm-mips/mach-ip22')
-rw-r--r--include/asm-mips/mach-ip22/cpu-feature-overrides.h8
-rw-r--r--include/asm-mips/mach-ip22/spaces.h2
2 files changed, 9 insertions, 1 deletions
diff --git a/include/asm-mips/mach-ip22/cpu-feature-overrides.h b/include/asm-mips/mach-ip22/cpu-feature-overrides.h
index 3c8896d9b133..ab9714668177 100644
--- a/include/asm-mips/mach-ip22/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-ip22/cpu-feature-overrides.h
@@ -11,6 +11,12 @@
11/* 11/*
12 * IP22 with a variety of processors so we can't use defaults for everything. 12 * IP22 with a variety of processors so we can't use defaults for everything.
13 */ 13 */
14#define cpu_has_tlb 1
15#define cpu_has_4kex 1
16#define cpu_has_4kcache 1
17#define cpu_has_fpu 1
18#define cpu_has_32fpr 1
19#define cpu_has_counter 1
14#define cpu_has_mips16 0 20#define cpu_has_mips16 0
15#define cpu_has_divec 0 21#define cpu_has_divec 0
16#define cpu_has_cache_cdex_p 1 22#define cpu_has_cache_cdex_p 1
@@ -23,6 +29,8 @@
23#define cpu_has_dc_aliases (PAGE_SIZE < 0x4000) 29#define cpu_has_dc_aliases (PAGE_SIZE < 0x4000)
24#define cpu_has_ic_fills_f_dc 0 30#define cpu_has_ic_fills_f_dc 0
25 31
32#define cpu_has_dsp 0
33
26#define cpu_has_nofpuex 0 34#define cpu_has_nofpuex 0
27#define cpu_has_64bits 1 35#define cpu_has_64bits 1
28 36
diff --git a/include/asm-mips/mach-ip22/spaces.h b/include/asm-mips/mach-ip22/spaces.h
index e96166f27c49..8385f716798d 100644
--- a/include/asm-mips/mach-ip22/spaces.h
+++ b/include/asm-mips/mach-ip22/spaces.h
@@ -44,7 +44,7 @@
44#define CAC_BASE 0xffffffff80000000 44#define CAC_BASE 0xffffffff80000000
45#define IO_BASE 0xffffffffa0000000 45#define IO_BASE 0xffffffffa0000000
46#define UNCAC_BASE 0xffffffffa0000000 46#define UNCAC_BASE 0xffffffffa0000000
47#define MAP_BASE 0xffffffffc0000000 47#define MAP_BASE 0xc000000000000000
48 48
49#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK)) 49#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK))
50#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK)) 50#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK))