diff options
author | Thiemo Seufer <ths@networkno.de> | 2007-09-05 12:44:50 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 18:46:03 -0400 |
commit | bcb0fd94633afde9c1f4f8aca43141ba2c78f04b (patch) | |
tree | 690cb6b8f61e05eaa50ea36ce809507fbacdf1ae /include/asm-mips/mach-excite | |
parent | 7ca16d269a1a4b96d98968b48f137977bcab1522 (diff) |
[MIPS] Define known MIPS ISA overrides for Sibyte and Excite boards.
Signed-Off-By: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/mach-excite')
-rw-r--r-- | include/asm-mips/mach-excite/cpu-feature-overrides.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/asm-mips/mach-excite/cpu-feature-overrides.h b/include/asm-mips/mach-excite/cpu-feature-overrides.h index 07f4322c235d..107104c3cd12 100644 --- a/include/asm-mips/mach-excite/cpu-feature-overrides.h +++ b/include/asm-mips/mach-excite/cpu-feature-overrides.h | |||
@@ -34,6 +34,11 @@ | |||
34 | #define cpu_has_nofpuex 0 | 34 | #define cpu_has_nofpuex 0 |
35 | #define cpu_has_64bits 1 | 35 | #define cpu_has_64bits 1 |
36 | 36 | ||
37 | #define cpu_has_mips32r1 0 | ||
38 | #define cpu_has_mips32r2 0 | ||
39 | #define cpu_has_mips64r1 0 | ||
40 | #define cpu_has_mips64r2 0 | ||
41 | |||
37 | #define cpu_has_inclusive_pcaches 0 | 42 | #define cpu_has_inclusive_pcaches 0 |
38 | 43 | ||
39 | #define cpu_dcache_line_size() 32 | 44 | #define cpu_dcache_line_size() 32 |