diff options
author | Sergei Shtylyov <sshtylyov@ru.mvista.com> | 2006-06-23 05:04:13 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-23 10:42:56 -0400 |
commit | f2c780c1fdbe5008c902c2d7e37242ac5e60f0b9 (patch) | |
tree | f2fb215610897e06812548986f3c37a6d6dc38ca /include/asm-mips/mach-db1x00/db1x00.h | |
parent | c52c17622e27876c2395f59cfe342497a399de41 (diff) |
[PATCH] Au1550/1200: add missing PSC #define's, make OSS driver use the proper ones
Add missing PSC #define's required for the drivers using PSC on DBAu1550
board (also fixing Au1550 PSC3 address) and all Au1200-based boards as
well. Make the OSS driver use the correct PSC definitions fo each board.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-mips/mach-db1x00/db1x00.h')
-rw-r--r-- | include/asm-mips/mach-db1x00/db1x00.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/include/asm-mips/mach-db1x00/db1x00.h b/include/asm-mips/mach-db1x00/db1x00.h index 8fbb4b42a8b5..0f5f4c29f4e8 100644 --- a/include/asm-mips/mach-db1x00/db1x00.h +++ b/include/asm-mips/mach-db1x00/db1x00.h | |||
@@ -30,8 +30,20 @@ | |||
30 | 30 | ||
31 | 31 | ||
32 | #ifdef CONFIG_MIPS_DB1550 | 32 | #ifdef CONFIG_MIPS_DB1550 |
33 | |||
34 | #define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX | ||
35 | #define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX | ||
36 | #define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC3_TX | ||
37 | #define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC3_RX | ||
38 | |||
39 | #define SPI_PSC_BASE PSC0_BASE_ADDR | ||
40 | #define AC97_PSC_BASE PSC1_BASE_ADDR | ||
41 | #define SMBUS_PSC_BASE PSC2_BASE_ADDR | ||
42 | #define I2S_PSC_BASE PSC3_BASE_ADDR | ||
43 | |||
33 | #define BCSR_KSEG1_ADDR 0xAF000000 | 44 | #define BCSR_KSEG1_ADDR 0xAF000000 |
34 | #define NAND_PHYS_ADDR 0x20000000 | 45 | #define NAND_PHYS_ADDR 0x20000000 |
46 | |||
35 | #else | 47 | #else |
36 | #define BCSR_KSEG1_ADDR 0xAE000000 | 48 | #define BCSR_KSEG1_ADDR 0xAE000000 |
37 | #endif | 49 | #endif |