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author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-10 17:48:43 -0400 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-10 17:48:43 -0400 |
commit | 0f166396e7e8931bb4acfd1a6ea1bd4f0b43f1dd (patch) | |
tree | 6279fa70695a4c56b7e935018a4c0fc1dfa82e68 /include/asm-mips/mach-cobalt/cobalt.h | |
parent | 5f60cfd932b42c69ed3226400cb5eab152576c3a (diff) | |
parent | 105b1bca4d7bed85bb296f7e7caec2fc643e9fbf (diff) |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (62 commits)
[MIPS] PNX8550: Cleanup proc code.
[MIPS] WRPPMC: Fix build.
[MIPS] Yosemite: Fix modpost warnings.
[MIPS] Change names of local variables to silence sparse
[MIPS] SB1: Fix modpost warning.
[MIPS] PNX: Fix modpost warnings.
[MIPS] Alchemy: Fix modpost warnings.
[MIPS] Non-FPAFF: Fix warning.
[MIPS] DEC: Fix modpost warning.
[MIPS] MIPSsim: Enable MIPSsim virtual network driver.
[MIPS] Delete Ocelot 3 support.
[MIPS] remove LASAT Networks platforms support
[MIPS] Early check for SMTC kernel on non-MT processor
[MIPS] Add debugfs files to show fpuemu statistics
[MIPS] Add some debugfs files to debug unaligned accesses
[MIPS] rbtx4938: Fix secondary PCIC and glue internal NICs
[MIPS] tc35815: Load MAC address via platform_device
[MIPS] Move FPU affinity code into separate file.
[MIPS] Make ioremap() work on TX39/49 special unmapped segment
[MIPS] rbtx4938: Update and minimize defconfig
...
Diffstat (limited to 'include/asm-mips/mach-cobalt/cobalt.h')
-rw-r--r-- | include/asm-mips/mach-cobalt/cobalt.h | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/include/asm-mips/mach-cobalt/cobalt.h b/include/asm-mips/mach-cobalt/cobalt.h index 684a501c04cf..9c9d2b998ca4 100644 --- a/include/asm-mips/mach-cobalt/cobalt.h +++ b/include/asm-mips/mach-cobalt/cobalt.h | |||
@@ -30,7 +30,6 @@ | |||
30 | #define COBALT_CPU_IRQ MIPS_CPU_IRQ_BASE | 30 | #define COBALT_CPU_IRQ MIPS_CPU_IRQ_BASE |
31 | 31 | ||
32 | #define COBALT_GALILEO_IRQ (COBALT_CPU_IRQ + 2) | 32 | #define COBALT_GALILEO_IRQ (COBALT_CPU_IRQ + 2) |
33 | #define COBALT_SCC_IRQ (COBALT_CPU_IRQ + 3) /* pre-production has 85C30 */ | ||
34 | #define COBALT_RAQ_SCSI_IRQ (COBALT_CPU_IRQ + 3) | 33 | #define COBALT_RAQ_SCSI_IRQ (COBALT_CPU_IRQ + 3) |
35 | #define COBALT_ETH0_IRQ (COBALT_CPU_IRQ + 3) | 34 | #define COBALT_ETH0_IRQ (COBALT_CPU_IRQ + 3) |
36 | #define COBALT_QUBE1_ETH0_IRQ (COBALT_CPU_IRQ + 4) | 35 | #define COBALT_QUBE1_ETH0_IRQ (COBALT_CPU_IRQ + 4) |
@@ -71,10 +70,6 @@ | |||
71 | 70 | ||
72 | extern int cobalt_board_id; | 71 | extern int cobalt_board_id; |
73 | 72 | ||
74 | #define PCI_CFG_SET(devfn,where) \ | ||
75 | GT_WRITE(GT_PCI0_CFGADDR_OFS, (0x80000000 | (PCI_SLOT (devfn) << 11) | \ | ||
76 | (PCI_FUNC (devfn) << 8) | (where))) | ||
77 | |||
78 | #define COBALT_LED_PORT (*(volatile unsigned char *) CKSEG1ADDR(0x1c000000)) | 73 | #define COBALT_LED_PORT (*(volatile unsigned char *) CKSEG1ADDR(0x1c000000)) |
79 | # define COBALT_LED_BAR_LEFT (1 << 0) /* Qube */ | 74 | # define COBALT_LED_BAR_LEFT (1 << 0) /* Qube */ |
80 | # define COBALT_LED_BAR_RIGHT (1 << 1) /* Qube */ | 75 | # define COBALT_LED_BAR_RIGHT (1 << 1) /* Qube */ |