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authorPete Popov <ppopov@embeddedalley.com>2005-03-01 02:54:50 -0500
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 14:30:48 -0400
commit2d32ffa44a5323fda147bd5b0723744a9163e37f (patch)
tree0c80197e0430fbd818a5b79e7098a9e060e0569a /include/asm-mips/mach-au1x00/au1000.h
parente3ad1c23ba72214669b364c6fa304531dc768c3e (diff)
Moved irq_tab_alchemy to the board specific irqmap.c files.
Cleaned up a to of warnings in dbdma.c. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/mach-au1x00/au1000.h')
-rw-r--r--include/asm-mips/mach-au1x00/au1000.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h
index 28b04a5f67cf..ffcd0492eb3a 100644
--- a/include/asm-mips/mach-au1x00/au1000.h
+++ b/include/asm-mips/mach-au1x00/au1000.h
@@ -757,6 +757,12 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
757#define AU1500_GPIO_207 62 757#define AU1500_GPIO_207 62
758#define AU1500_GPIO_208_215 63 758#define AU1500_GPIO_208_215 63
759 759
760/* shortcuts */
761#define INTA AU1000_PCI_INTA
762#define INTB AU1000_PCI_INTB
763#define INTC AU1000_PCI_INTC
764#define INTD AU1000_PCI_INTD
765
760#define UART0_ADDR 0xB1100000 766#define UART0_ADDR 0xB1100000
761#define UART3_ADDR 0xB1400000 767#define UART3_ADDR 0xB1400000
762 768
@@ -907,6 +913,12 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
907#define AU1500_GPIO_207 62 913#define AU1500_GPIO_207 62
908#define AU1500_GPIO_208_218 63 // Logical or of GPIO208:218 914#define AU1500_GPIO_208_218 63 // Logical or of GPIO208:218
909 915
916/* shortcuts */
917#define INTA AU1550_PCI_INTA
918#define INTB AU1550_PCI_INTB
919#define INTC AU1550_PCI_INTC
920#define INTD AU1550_PCI_INTD
921
910#define UART0_ADDR 0xB1100000 922#define UART0_ADDR 0xB1100000
911#define UART1_ADDR 0xB1200000 923#define UART1_ADDR 0xB1200000
912#define UART3_ADDR 0xB1400000 924#define UART3_ADDR 0xB1400000
@@ -1019,6 +1031,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
1019#define AU1000_LAST_INTC0_INT 31 1031#define AU1000_LAST_INTC0_INT 31
1020#define AU1000_LAST_INTC1_INT 63 1032#define AU1000_LAST_INTC1_INT 63
1021#define AU1000_MAX_INTR 63 1033#define AU1000_MAX_INTR 63
1034#define INTX 0xFF /* not valid */
1022 1035
1023/* Programmable Counters 0 and 1 */ 1036/* Programmable Counters 0 and 1 */
1024#define SYS_BASE 0xB1900000 1037#define SYS_BASE 0xB1900000