[MIPS] txx9tmr clockevent/clocksource driver

Convert jmr3927_clock_event_device to more generic
txx9tmr_clock_event_device which supports one-shot mode.  The
txx9tmr_clock_event_device can be used for TX49 too if the cp0 timer
interrupt was not available.

Convert jmr3927_hpt_read to txx9_clocksource driver which does not
depends jiffies anymore.  The txx9_clocksource itself can be used for
TX49, but normally TX49 uses higher precision clocksource_mips.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

3 files changed, 2 insertions, 48 deletions

diff --git a/include/asm-mips/jmr3927/jmr3927.h b/include/asm-mips/jmr3927/jmr3927.h
index b2dc35f56181..81602c8047eb 100644
--- a/include/asm-mips/jmr3927/jmr3927.h
+++ b/include/asm-mips/jmr3927/jmr3927.h
@@ -132,9 +132,7 @@
 #define JMR3927_IRQ_IRC_DMA     (JMR3927_IRQ_IRC + TX3927_IR_DMA)
 #define JMR3927_IRQ_IRC_PIO     (JMR3927_IRQ_IRC + TX3927_IR_PIO)
 #define JMR3927_IRQ_IRC_PCI     (JMR3927_IRQ_IRC + TX3927_IR_PCI)
-#define JMR3927_IRQ_IRC_TMR0    (JMR3927_IRQ_IRC + TX3927_IR_TMR0)
-#define JMR3927_IRQ_IRC_TMR1    (JMR3927_IRQ_IRC + TX3927_IR_TMR1)
-#define JMR3927_IRQ_IRC_TMR2    (JMR3927_IRQ_IRC + TX3927_IR_TMR2)
+#define JMR3927_IRQ_IRC_TMR(ch) (JMR3927_IRQ_IRC + TX3927_IR_TMR(ch))
 #define JMR3927_IRQ_IOC_PCIA    (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIA)
 #define JMR3927_IRQ_IOC_PCIB    (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIB)
 #define JMR3927_IRQ_IOC_PCIC    (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIC)
@@ -148,17 +146,12 @@
 #define JMR3927_IRQ_IOCINT      JMR3927_IRQ_IRC_INT1
 /* TC35815 100M Ether (JMR-TX3912:JPW4:2-3 Short) */
 #define JMR3927_IRQ_ETHER0      JMR3927_IRQ_IRC_INT3
-/* Clock Tick (10ms) */
-#define JMR3927_IRQ_TICK        JMR3927_IRQ_IRC_TMR0
 
 /* Clocks */
 #define JMR3927_CORECLK 132710400       /* 132.7MHz */
 #define JMR3927_GBUSCLK (JMR3927_CORECLK / 2)   /* 66.35MHz */
 #define JMR3927_IMCLK   (JMR3927_CORECLK / 4)   /* 33.17MHz */
 
-#define jmr3927_tmrptr          tx3927_tmrptr(0)        /* TMR0 */
-
-
 /*
  * TX3927 Pin Configuration:
  *
diff --git a/include/asm-mips/jmr3927/tx3927.h b/include/asm-mips/jmr3927/tx3927.h
index 211bcf47fffb..338f99882a39 100644
--- a/include/asm-mips/jmr3927/tx3927.h
+++ b/include/asm-mips/jmr3927/tx3927.h
@@ -222,9 +222,7 @@ struct tx3927_ccfg_reg {
 #define TX3927_IR_DMA   8
 #define TX3927_IR_PIO   9
 #define TX3927_IR_PCI   10
-#define TX3927_IR_TMR0  13
-#define TX3927_IR_TMR1  14
-#define TX3927_IR_TMR2  15
+#define TX3927_IR_TMR(ch)       (13 + (ch))
 #define TX3927_NUM_IR   16
 
 /*
diff --git a/include/asm-mips/jmr3927/txx927.h b/include/asm-mips/jmr3927/txx927.h
index 58a8ff6be815..0474fe8dac3f 100644
--- a/include/asm-mips/jmr3927/txx927.h
+++ b/include/asm-mips/jmr3927/txx927.h
@@ -10,22 +10,6 @@
 #ifndef __ASM_TXX927_H
 #define __ASM_TXX927_H
 
-struct txx927_tmr_reg {
-        volatile unsigned long tcr;
-        volatile unsigned long tisr;
-        volatile unsigned long cpra;
-        volatile unsigned long cprb;
-        volatile unsigned long itmr;
-        volatile unsigned long unused0[3];
-        volatile unsigned long ccdr;
-        volatile unsigned long unused1[3];
-        volatile unsigned long pgmr;
-        volatile unsigned long unused2[3];
-        volatile unsigned long wtmr;
-        volatile unsigned long unused3[43];
-        volatile unsigned long trr;
-};
-
 struct txx927_sio_reg {
         volatile unsigned long lcr;
         volatile unsigned long dicr;
@@ -51,27 +35,6 @@ struct txx927_pio_reg {
 };
 
 /*
- * TMR
- */
-/* TMTCR : Timer Control */
-#define TXx927_TMTCR_TCE        0x00000080
-#define TXx927_TMTCR_CCDE       0x00000040
-#define TXx927_TMTCR_CRE        0x00000020
-#define TXx927_TMTCR_ECES       0x00000008
-#define TXx927_TMTCR_CCS        0x00000004
-#define TXx927_TMTCR_TMODE_MASK 0x00000003
-#define TXx927_TMTCR_TMODE_ITVL 0x00000000
-
-/* TMTISR : Timer Int. Status */
-#define TXx927_TMTISR_TPIBS     0x00000004
-#define TXx927_TMTISR_TPIAS     0x00000002
-#define TXx927_TMTISR_TIIS      0x00000001
-
-/* TMTITMR : Interval Timer Mode */
-#define TXx927_TMTITMR_TIIE     0x00008000
-#define TXx927_TMTITMR_TZCE     0x00000001
-
-/*
  * SIO
  */
 /* SILCR : Line Control */