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author | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-01 19:44:02 -0500 |
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committer | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-01 19:44:02 -0500 |
commit | c3e59d1e891f6140a346de2b8547e25133c716b0 (patch) | |
tree | b2a669f625009a3a33f20f648bd654637323d296 /include/asm-mips/irq.h | |
parent | b07e3c3a1db0ce399d2a1d04860e1b901927c05e (diff) | |
parent | aa414dff4f7bef29457592414551becdca72dd6b (diff) |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (31 commits)
[MIPS] Remove duplicate ISA DMA code for 0 DMA channel case.
[MIPS] Remove unused definition of cpu_to_lelongp()
[MIPS] Remove userspace proofing from <asm/bitops.h>.
[MIPS] Remove old junk left from old atomic_lock.
[MIPS] Use conditional traps for BUG_ON on MIPS II and better.
[MIPS] mips HPT cleanup: make clocksource_mips public
[MIPS] do_IRQ cleanup
[MIPS] Avoid dupliate D-cache flush on R400C / R4400 SC and MC variants.
[MIPS] Remove redundant r4k_blast_icache() calls
[MIPS] Work around bogus gcc warnings.
[MIPS] Fix double inclusions
[MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irq
[MIPS] IRQ cleanups
[MIPS] mips hpt cleanup: get rid of mips_hpt_init
[MIPS] PB1200: Remove duplicate definitions
[MIPS] Fix alignment hole in struct cache_desc; shrink struct.
[MIPS] Oprofile: kernel support for the R10000.
[MIPS] Remove unused R10000 performance counter definitions.
[MIPS] Add support for kexec
[MIPS] Don't print presence of WAIT instruction on bootup.
...
Diffstat (limited to 'include/asm-mips/irq.h')
-rw-r--r-- | include/asm-mips/irq.h | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/include/asm-mips/irq.h b/include/asm-mips/irq.h index 35a05ca5560c..67657089efa7 100644 --- a/include/asm-mips/irq.h +++ b/include/asm-mips/irq.h | |||
@@ -24,8 +24,6 @@ static inline int irq_canonicalize(int irq) | |||
24 | #define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */ | 24 | #define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */ |
25 | #endif | 25 | #endif |
26 | 26 | ||
27 | extern asmlinkage unsigned int do_IRQ(unsigned int irq); | ||
28 | |||
29 | #ifdef CONFIG_MIPS_MT_SMTC | 27 | #ifdef CONFIG_MIPS_MT_SMTC |
30 | /* | 28 | /* |
31 | * Clear interrupt mask handling "backstop" if irq_hwmask | 29 | * Clear interrupt mask handling "backstop" if irq_hwmask |
@@ -43,8 +41,6 @@ do { \ | |||
43 | #define __DO_IRQ_SMTC_HOOK() do { } while (0) | 41 | #define __DO_IRQ_SMTC_HOOK() do { } while (0) |
44 | #endif | 42 | #endif |
45 | 43 | ||
46 | #ifdef CONFIG_PREEMPT | ||
47 | |||
48 | /* | 44 | /* |
49 | * do_IRQ handles all normal device IRQ's (the special | 45 | * do_IRQ handles all normal device IRQ's (the special |
50 | * SMP cross-CPU interrupts have their own specific | 46 | * SMP cross-CPU interrupts have their own specific |
@@ -57,12 +53,10 @@ do { \ | |||
57 | do { \ | 53 | do { \ |
58 | irq_enter(); \ | 54 | irq_enter(); \ |
59 | __DO_IRQ_SMTC_HOOK(); \ | 55 | __DO_IRQ_SMTC_HOOK(); \ |
60 | __do_IRQ((irq)); \ | 56 | generic_handle_irq(irq); \ |
61 | irq_exit(); \ | 57 | irq_exit(); \ |
62 | } while (0) | 58 | } while (0) |
63 | 59 | ||
64 | #endif | ||
65 | |||
66 | extern void arch_init_irq(void); | 60 | extern void arch_init_irq(void); |
67 | extern void spurious_interrupt(void); | 61 | extern void spurious_interrupt(void); |
68 | 62 | ||