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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2006-02-16 11:36:24 -0500
committerRalf Baechle <ralf@linux-mips.org>2006-03-21 08:27:45 -0500
commita8433137ea9143bb3a2bc18a3407b5a130fdb868 (patch)
treeff40223bf542173015c070a988a4f3b0554f89ea /include/asm-mips/io.h
parentc1449c8fa40859eb269025a7db85b34115205f5b (diff)
[MIPS] Make I/O helpers more customizable
1. Move ioswab*() and __mem_ioswab*() to mangle-port.h. This gets rid of CONFIG_SGI_IP22 from include/asm-mips/io.h. 2. Pass a virtual address to *ioswab*(). Then we can provide mach-specific *ioswab*() and can do every evil thing based on its argument. It could be useful on machines which have regions with different endian conversion scheme. 3. Call __swizzle_addr*() _after_ adding mips_io_port_base. This unifies the meaning of the argument of __swizzle_addr*() (always virtual address). Then mach-specific __swizzle_addr*() can do every evil thing based on the argument. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/io.h')
-rw-r--r--include/asm-mips/io.h69
1 files changed, 12 insertions, 57 deletions
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index ba1d7bbc15d2..546a17e56a9b 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -40,56 +40,13 @@
40 * hardware. An example use would be for flash memory that's used for 40 * hardware. An example use would be for flash memory that's used for
41 * execute in place. 41 * execute in place.
42 */ 42 */
43# define __raw_ioswabb(x) (x) 43# define __raw_ioswabb(a,x) (x)
44# define __raw_ioswabw(x) (x) 44# define __raw_ioswabw(a,x) (x)
45# define __raw_ioswabl(x) (x) 45# define __raw_ioswabl(a,x) (x)
46# define __raw_ioswabq(x) (x) 46# define __raw_ioswabq(a,x) (x)
47# define ____raw_ioswabq(x) (x) 47# define ____raw_ioswabq(a,x) (x)
48 48
49/* 49/* ioswab[bwlq], __mem_ioswab[bwlq] are defined in mangle-port.h */
50 * Sane hardware offers swapping of PCI/ISA I/O space accesses in hardware;
51 * less sane hardware forces software to fiddle with this...
52 *
53 * Regardless, if the host bus endianness mismatches that of PCI/ISA, then
54 * you can't have the numerical value of data and byte addresses within
55 * multibyte quantities both preserved at the same time. Hence two
56 * variations of functions: non-prefixed ones that preserve the value
57 * and prefixed ones that preserve byte addresses. The latters are
58 * typically used for moving raw data between a peripheral and memory (cf.
59 * string I/O functions), hence the "__mem_" prefix.
60 */
61#if defined(CONFIG_SWAP_IO_SPACE)
62
63# define ioswabb(x) (x)
64# define __mem_ioswabb(x) (x)
65# ifdef CONFIG_SGI_IP22
66/*
67 * IP22 seems braindead enough to swap 16bits values in hardware, but
68 * not 32bits. Go figure... Can't tell without documentation.
69 */
70# define ioswabw(x) (x)
71# define __mem_ioswabw(x) le16_to_cpu(x)
72# else
73# define ioswabw(x) le16_to_cpu(x)
74# define __mem_ioswabw(x) (x)
75# endif
76# define ioswabl(x) le32_to_cpu(x)
77# define __mem_ioswabl(x) (x)
78# define ioswabq(x) le64_to_cpu(x)
79# define __mem_ioswabq(x) (x)
80
81#else
82
83# define ioswabb(x) (x)
84# define __mem_ioswabb(x) (x)
85# define ioswabw(x) (x)
86# define __mem_ioswabw(x) cpu_to_le16(x)
87# define ioswabl(x) (x)
88# define __mem_ioswabl(x) cpu_to_le32(x)
89# define ioswabq(x) (x)
90# define __mem_ioswabq(x) cpu_to_le32(x)
91
92#endif
93 50
94#define IO_SPACE_LIMIT 0xffff 51#define IO_SPACE_LIMIT 0xffff
95 52
@@ -346,7 +303,7 @@ static inline void pfx##write##bwlq(type val, \
346 \ 303 \
347 __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); \ 304 __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); \
348 \ 305 \
349 __val = pfx##ioswab##bwlq(val); \ 306 __val = pfx##ioswab##bwlq(__mem, val); \
350 \ 307 \
351 if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) \ 308 if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) \
352 *__mem = __val; \ 309 *__mem = __val; \
@@ -401,7 +358,7 @@ static inline type pfx##read##bwlq(const volatile void __iomem *mem) \
401 BUG(); \ 358 BUG(); \
402 } \ 359 } \
403 \ 360 \
404 return pfx##ioswab##bwlq(__val); \ 361 return pfx##ioswab##bwlq(__mem, __val); \
405} 362}
406 363
407#define __BUILD_IOPORT_SINGLE(pfx, bwlq, type, p, slow) \ 364#define __BUILD_IOPORT_SINGLE(pfx, bwlq, type, p, slow) \
@@ -411,10 +368,9 @@ static inline void pfx##out##bwlq##p(type val, unsigned long port) \
411 volatile type *__addr; \ 368 volatile type *__addr; \
412 type __val; \ 369 type __val; \
413 \ 370 \
414 port = __swizzle_addr_##bwlq(port); \ 371 __addr = (void *)__swizzle_addr_##bwlq(mips_io_port_base + port); \
415 __addr = (void *)(mips_io_port_base + port); \
416 \ 372 \
417 __val = pfx##ioswab##bwlq(val); \ 373 __val = pfx##ioswab##bwlq(__addr, val); \
418 \ 374 \
419 /* Really, we want this to be atomic */ \ 375 /* Really, we want this to be atomic */ \
420 BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \ 376 BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \
@@ -428,15 +384,14 @@ static inline type pfx##in##bwlq##p(unsigned long port) \
428 volatile type *__addr; \ 384 volatile type *__addr; \
429 type __val; \ 385 type __val; \
430 \ 386 \
431 port = __swizzle_addr_##bwlq(port); \ 387 __addr = (void *)__swizzle_addr_##bwlq(mips_io_port_base + port); \
432 __addr = (void *)(mips_io_port_base + port); \
433 \ 388 \
434 BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \ 389 BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \
435 \ 390 \
436 __val = *__addr; \ 391 __val = *__addr; \
437 slow; \ 392 slow; \
438 \ 393 \
439 return pfx##ioswab##bwlq(__val); \ 394 return pfx##ioswab##bwlq(__addr, __val); \
440} 395}
441 396
442#define __BUILD_MEMORY_PFX(bus, bwlq, type) \ 397#define __BUILD_MEMORY_PFX(bus, bwlq, type) \