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authorChris Dearman <chris@mips.com>2007-09-18 19:58:24 -0400
committerRalf Baechle <ralf@linux-mips.org>2008-04-28 12:14:25 -0400
commit351336929ccf222ae38ff0cb7a8dd5fd5c6236a0 (patch)
treed9e9253bd30cf011d248ad3b63761a9a725e5cb0 /include/asm-mips/io.h
parentbec5052743ec8ae4c5669918cf9b130bf15709a2 (diff)
[MIPS] Allow setting of the cache attribute at run time.
Slightly tacky, but there is a precedent in the sparc archirecture code. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/io.h')
-rw-r--r--include/asm-mips/io.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index e62058b0d28c..f18d2816cbec 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -273,7 +273,7 @@ static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size,
273 * memory-like regions on I/O busses. 273 * memory-like regions on I/O busses.
274 */ 274 */
275#define ioremap_cachable(offset, size) \ 275#define ioremap_cachable(offset, size) \
276 __ioremap_mode((offset), (size), PAGE_CACHABLE_DEFAULT) 276 __ioremap_mode((offset), (size), _page_cachable_default)
277 277
278/* 278/*
279 * These two are MIPS specific ioremap variant. ioremap_cacheable_cow 279 * These two are MIPS specific ioremap variant. ioremap_cacheable_cow