diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2006-04-05 04:45:45 -0400 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2006-04-18 22:14:28 -0400 |
| commit | 41c594ab65fc89573af296d192aa5235d09717ab (patch) | |
| tree | 562462512a320f386bdf49eabfbb26bb3ee761fa /include/asm-mips/interrupt.h | |
| parent | 2600990e640e3bef29ed89d565864cf16ee83833 (diff) | |
[MIPS] MT: Improved multithreading support.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/interrupt.h')
| -rw-r--r-- | include/asm-mips/interrupt.h | 65 |
1 files changed, 55 insertions, 10 deletions
diff --git a/include/asm-mips/interrupt.h b/include/asm-mips/interrupt.h index 774348734fa0..4bb9c06f4410 100644 --- a/include/asm-mips/interrupt.h +++ b/include/asm-mips/interrupt.h | |||
| @@ -19,7 +19,12 @@ __asm__ ( | |||
| 19 | " .set push \n" | 19 | " .set push \n" |
| 20 | " .set reorder \n" | 20 | " .set reorder \n" |
| 21 | " .set noat \n" | 21 | " .set noat \n" |
| 22 | #ifdef CONFIG_CPU_MIPSR2 | 22 | #ifdef CONFIG_MIPS_MT_SMTC |
| 23 | " mfc0 $1, $2, 1 # SMTC - clear TCStatus.IXMT \n" | ||
| 24 | " ori $1, 0x400 \n" | ||
| 25 | " xori $1, 0x400 \n" | ||
| 26 | " mtc0 $1, $2, 1 \n" | ||
| 27 | #elif defined(CONFIG_CPU_MIPSR2) | ||
| 23 | " ei \n" | 28 | " ei \n" |
| 24 | #else | 29 | #else |
| 25 | " mfc0 $1,$12 \n" | 30 | " mfc0 $1,$12 \n" |
| @@ -62,7 +67,12 @@ __asm__ ( | |||
| 62 | " .macro local_irq_disable\n" | 67 | " .macro local_irq_disable\n" |
| 63 | " .set push \n" | 68 | " .set push \n" |
| 64 | " .set noat \n" | 69 | " .set noat \n" |
| 65 | #ifdef CONFIG_CPU_MIPSR2 | 70 | #ifdef CONFIG_MIPS_MT_SMTC |
| 71 | " mfc0 $1, $2, 1 \n" | ||
| 72 | " ori $1, 0x400 \n" | ||
| 73 | " .set noreorder \n" | ||
| 74 | " mtc0 $1, $2, 1 \n" | ||
| 75 | #elif defined(CONFIG_CPU_MIPSR2) | ||
| 66 | " di \n" | 76 | " di \n" |
| 67 | #else | 77 | #else |
| 68 | " mfc0 $1,$12 \n" | 78 | " mfc0 $1,$12 \n" |
| @@ -88,7 +98,11 @@ __asm__ ( | |||
| 88 | " .macro local_save_flags flags \n" | 98 | " .macro local_save_flags flags \n" |
| 89 | " .set push \n" | 99 | " .set push \n" |
| 90 | " .set reorder \n" | 100 | " .set reorder \n" |
| 101 | #ifdef CONFIG_MIPS_MT_SMTC | ||
| 102 | " mfc0 \\flags, $2, 1 \n" | ||
| 103 | #else | ||
| 91 | " mfc0 \\flags, $12 \n" | 104 | " mfc0 \\flags, $12 \n" |
| 105 | #endif | ||
| 92 | " .set pop \n" | 106 | " .set pop \n" |
| 93 | " .endm \n"); | 107 | " .endm \n"); |
| 94 | 108 | ||
| @@ -102,7 +116,13 @@ __asm__ ( | |||
| 102 | " .set push \n" | 116 | " .set push \n" |
| 103 | " .set reorder \n" | 117 | " .set reorder \n" |
| 104 | " .set noat \n" | 118 | " .set noat \n" |
| 105 | #ifdef CONFIG_CPU_MIPSR2 | 119 | #ifdef CONFIG_MIPS_MT_SMTC |
| 120 | " mfc0 \\result, $2, 1 \n" | ||
| 121 | " ori $1, \\result, 0x400 \n" | ||
| 122 | " .set noreorder \n" | ||
| 123 | " mtc0 $1, $2, 1 \n" | ||
| 124 | " andi \\result, \\result, 0x400 \n" | ||
| 125 | #elif defined(CONFIG_CPU_MIPSR2) | ||
| 106 | " di \\result \n" | 126 | " di \\result \n" |
| 107 | " andi \\result, 1 \n" | 127 | " andi \\result, 1 \n" |
| 108 | #else | 128 | #else |
| @@ -128,7 +148,14 @@ __asm__ ( | |||
| 128 | " .set push \n" | 148 | " .set push \n" |
| 129 | " .set noreorder \n" | 149 | " .set noreorder \n" |
| 130 | " .set noat \n" | 150 | " .set noat \n" |
| 131 | #if defined(CONFIG_CPU_MIPSR2) && defined(CONFIG_IRQ_CPU) | 151 | #ifdef CONFIG_MIPS_MT_SMTC |
| 152 | "mfc0 $1, $2, 1 \n" | ||
| 153 | "andi \\flags, 0x400 \n" | ||
| 154 | "ori $1, 0x400 \n" | ||
| 155 | "xori $1, 0x400 \n" | ||
| 156 | "or \\flags, $1 \n" | ||
| 157 | "mtc0 \\flags, $2, 1 \n" | ||
| 158 | #elif defined(CONFIG_CPU_MIPSR2) && defined(CONFIG_IRQ_CPU) | ||
| 132 | /* | 159 | /* |
| 133 | * Slow, but doesn't suffer from a relativly unlikely race | 160 | * Slow, but doesn't suffer from a relativly unlikely race |
| 134 | * condition we're having since days 1. | 161 | * condition we're having since days 1. |
| @@ -167,11 +194,29 @@ do { \ | |||
| 167 | : "memory"); \ | 194 | : "memory"); \ |
| 168 | } while(0) | 195 | } while(0) |
| 169 | 196 | ||
| 170 | #define irqs_disabled() \ | 197 | static inline int irqs_disabled(void) |
| 171 | ({ \ | 198 | { |
| 172 | unsigned long flags; \ | 199 | #ifdef CONFIG_MIPS_MT_SMTC |
| 173 | local_save_flags(flags); \ | 200 | /* |
| 174 | !(flags & 1); \ | 201 | * SMTC model uses TCStatus.IXMT to disable interrupts for a thread/CPU |
| 175 | }) | 202 | */ |
| 203 | unsigned long __result; | ||
| 204 | |||
| 205 | __asm__ __volatile__( | ||
| 206 | " .set noreorder \n" | ||
| 207 | " mfc0 %0, $2, 1 \n" | ||
| 208 | " andi %0, 0x400 \n" | ||
| 209 | " slt %0, $0, %0 \n" | ||
| 210 | " .set reorder \n" | ||
| 211 | : "=r" (__result)); | ||
| 212 | |||
| 213 | return __result; | ||
| 214 | #else | ||
| 215 | unsigned long flags; | ||
| 216 | local_save_flags(flags); | ||
| 217 | |||
| 218 | return !(flags & 1); | ||
| 219 | #endif | ||
| 220 | } | ||
| 176 | 221 | ||
| 177 | #endif /* _ASM_INTERRUPT_H */ | 222 | #endif /* _ASM_INTERRUPT_H */ |