Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (31 commits)
  [MIPS] Remove duplicate ISA DMA code for 0 DMA channel case.
  [MIPS] Remove unused definition of cpu_to_lelongp()
  [MIPS] Remove userspace proofing from <asm/bitops.h>.
  [MIPS] Remove old junk left from old atomic_lock.
  [MIPS] Use conditional traps for BUG_ON on MIPS II and better.
  [MIPS] mips HPT cleanup: make clocksource_mips public
  [MIPS] do_IRQ cleanup
  [MIPS] Avoid dupliate D-cache flush on R400C / R4400 SC and MC variants.
  [MIPS] Remove redundant r4k_blast_icache() calls
  [MIPS] Work around bogus gcc warnings.
  [MIPS] Fix double inclusions
  [MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irq
  [MIPS] IRQ cleanups
  [MIPS] mips hpt cleanup: get rid of mips_hpt_init
  [MIPS] PB1200: Remove duplicate definitions
  [MIPS] Fix alignment hole in struct cache_desc; shrink struct.
  [MIPS] Oprofile: kernel support for the R10000.
  [MIPS] Remove unused R10000 performance counter definitions.
  [MIPS] Add support for kexec
  [MIPS] Don't print presence of WAIT instruction on bootup.
  ...

1 files changed, 14 insertions, 0 deletions

diff --git a/include/asm-mips/gt64120.h b/include/asm-mips/gt64120.h
index 2edd171bb6cd..4bf8e28f8850 100644
--- a/include/asm-mips/gt64120.h
+++ b/include/asm-mips/gt64120.h
@@ -451,6 +451,13 @@
 #define GT_SDRAM_OPMODE_OP_MODE         3
 #define GT_SDRAM_OPMODE_OP_CBR          4
 
+#define GT_TC_CONTROL_ENTC0_SHF         0
+#define GT_TC_CONTROL_ENTC0_MSK         (MSK(1) << GT_TC_CONTROL_ENTC0_SHF)
+#define GT_TC_CONTROL_ENTC0_BIT         GT_TC_CONTROL_ENTC0_MSK
+#define GT_TC_CONTROL_SELTC0_SHF        1
+#define GT_TC_CONTROL_SELTC0_MSK        (MSK(1) << GT_TC_CONTROL_SELTC0_SHF)
+#define GT_TC_CONTROL_SELTC0_BIT        GT_TC_CONTROL_SELTC0_MSK
+
 
 #define GT_PCI0_BARE_SWSCS3BOOTDIS_SHF  0
 #define GT_PCI0_BARE_SWSCS3BOOTDIS_MSK  (MSK(1) << GT_PCI0_BARE_SWSCS3BOOTDIS_SHF)
@@ -523,6 +530,13 @@
 #define GT_PCI0_CMD_SWORDSWAP_MSK       (MSK(1) << GT_PCI0_CMD_SWORDSWAP_SHF)
 #define GT_PCI0_CMD_SWORDSWAP_BIT       GT_PCI0_CMD_SWORDSWAP_MSK
 
+#define GT_INTR_T0EXP_SHF               8
+#define GT_INTR_T0EXP_MSK               (MSK(1) << GT_INTR_T0EXP_SHF)
+#define GT_INTR_T0EXP_BIT               GT_INTR_T0EXP_MSK
+#define GT_INTR_RETRYCTR0_SHF           20
+#define GT_INTR_RETRYCTR0_MSK           (MSK(1) << GT_INTR_RETRYCTR0_SHF)
+#define GT_INTR_RETRYCTR0_BIT           GT_INTR_RETRYCTR0_MSK
+
 /*
  *  Misc
  */