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authorYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>2006-10-01 06:47:08 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-10-01 18:17:00 -0400
commit04b314b2c3732bb5aa752fdbb3076de16decdab6 (patch)
treee36a6ae290cbb33f17c7aa60f15f9302bec11f25 /include/asm-mips/galileo-boards
parentb772da30b4b22230c214f37429edcd7ddbf641e1 (diff)
[MIPS] Remove unused galileo-boars header files
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/galileo-boards')
-rw-r--r--include/asm-mips/galileo-boards/ev96100.h55
-rw-r--r--include/asm-mips/galileo-boards/ev96100int.h12
2 files changed, 0 insertions, 67 deletions
diff --git a/include/asm-mips/galileo-boards/ev96100.h b/include/asm-mips/galileo-boards/ev96100.h
deleted file mode 100644
index 070dfd84a8e8..000000000000
--- a/include/asm-mips/galileo-boards/ev96100.h
+++ /dev/null
@@ -1,55 +0,0 @@
1/*
2 *
3 */
4#ifndef _MIPS_EV96100_H
5#define _MIPS_EV96100_H
6
7#include <asm/addrspace.h>
8
9/*
10 * GT64120 config space base address
11 */
12#define GT64120_BASE (KSEG1ADDR(0x14000000))
13#define MIPS_GT_BASE GT64120_BASE
14
15/*
16 * PCI Bus allocation
17 */
18#define GT_PCI_MEM_BASE 0x12000000UL
19#define GT_PCI_MEM_SIZE 0x02000000UL
20#define GT_PCI_IO_BASE 0x10000000UL
21#define GT_PCI_IO_SIZE 0x02000000UL
22#define GT_ISA_IO_BASE PCI_IO_BASE
23
24/*
25 * Duart I/O ports.
26 */
27#define EV96100_COM1_BASE_ADDR (0xBD000000 + 0x20)
28#define EV96100_COM2_BASE_ADDR (0xBD000000 + 0x00)
29
30
31/*
32 * EV96100 interrupt controller register base.
33 */
34#define EV96100_ICTRL_REGS_BASE (KSEG1ADDR(0x1f000000))
35
36/*
37 * EV96100 UART register base.
38 */
39#define EV96100_UART0_REGS_BASE EV96100_COM1_BASE_ADDR
40#define EV96100_UART1_REGS_BASE EV96100_COM2_BASE_ADDR
41#define EV96100_BASE_BAUD ( 3686400 / 16 )
42
43
44/*
45 * Because of an error/peculiarity in the Galileo chip, we need to swap the
46 * bytes when running bigendian.
47 */
48#define __GT_READ(ofs) \
49 (*(volatile u32 *)(GT64120_BASE+(ofs)))
50#define __GT_WRITE(ofs, data) \
51 do { *(volatile u32 *)(GT64120_BASE+(ofs)) = (data); } while (0)
52#define GT_READ(ofs) le32_to_cpu(__GT_READ(ofs))
53#define GT_WRITE(ofs, data) __GT_WRITE(ofs, cpu_to_le32(data))
54
55#endif /* !(_MIPS_EV96100_H) */
diff --git a/include/asm-mips/galileo-boards/ev96100int.h b/include/asm-mips/galileo-boards/ev96100int.h
deleted file mode 100644
index c58b16d06d6e..000000000000
--- a/include/asm-mips/galileo-boards/ev96100int.h
+++ /dev/null
@@ -1,12 +0,0 @@
1/*
2 *
3 */
4#ifndef _MIPS_EV96100INT_H
5#define _MIPS_EV96100INT_H
6
7#define EV96100INT_UART_0 6 /* IP 6 */
8#define EV96100INT_TIMER 7 /* IP 7 */
9
10extern void ev96100int_init(void);
11
12#endif /* !(_MIPS_EV96100_H) */