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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-mips/galileo-boards/ev96100.h
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'include/asm-mips/galileo-boards/ev96100.h')
-rw-r--r--include/asm-mips/galileo-boards/ev96100.h55
1 files changed, 55 insertions, 0 deletions
diff --git a/include/asm-mips/galileo-boards/ev96100.h b/include/asm-mips/galileo-boards/ev96100.h
new file mode 100644
index 000000000000..070dfd84a8e8
--- /dev/null
+++ b/include/asm-mips/galileo-boards/ev96100.h
@@ -0,0 +1,55 @@
1/*
2 *
3 */
4#ifndef _MIPS_EV96100_H
5#define _MIPS_EV96100_H
6
7#include <asm/addrspace.h>
8
9/*
10 * GT64120 config space base address
11 */
12#define GT64120_BASE (KSEG1ADDR(0x14000000))
13#define MIPS_GT_BASE GT64120_BASE
14
15/*
16 * PCI Bus allocation
17 */
18#define GT_PCI_MEM_BASE 0x12000000UL
19#define GT_PCI_MEM_SIZE 0x02000000UL
20#define GT_PCI_IO_BASE 0x10000000UL
21#define GT_PCI_IO_SIZE 0x02000000UL
22#define GT_ISA_IO_BASE PCI_IO_BASE
23
24/*
25 * Duart I/O ports.
26 */
27#define EV96100_COM1_BASE_ADDR (0xBD000000 + 0x20)
28#define EV96100_COM2_BASE_ADDR (0xBD000000 + 0x00)
29
30
31/*
32 * EV96100 interrupt controller register base.
33 */
34#define EV96100_ICTRL_REGS_BASE (KSEG1ADDR(0x1f000000))
35
36/*
37 * EV96100 UART register base.
38 */
39#define EV96100_UART0_REGS_BASE EV96100_COM1_BASE_ADDR
40#define EV96100_UART1_REGS_BASE EV96100_COM2_BASE_ADDR
41#define EV96100_BASE_BAUD ( 3686400 / 16 )
42
43
44/*
45 * Because of an error/peculiarity in the Galileo chip, we need to swap the
46 * bytes when running bigendian.
47 */
48#define __GT_READ(ofs) \
49 (*(volatile u32 *)(GT64120_BASE+(ofs)))
50#define __GT_WRITE(ofs, data) \
51 do { *(volatile u32 *)(GT64120_BASE+(ofs)) = (data); } while (0)
52#define GT_READ(ofs) le32_to_cpu(__GT_READ(ofs))
53#define GT_WRITE(ofs, data) __GT_WRITE(ofs, cpu_to_le32(data))
54
55#endif /* !(_MIPS_EV96100_H) */