diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2006-10-30 22:45:07 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2006-12-04 17:43:14 -0500 |
commit | 0004a9dfeaa709a7f853487aba19932c9b1a87c8 (patch) | |
tree | e9f1f4b1ca897e57f46778cef283617ba83fc855 /include/asm-mips/futex.h | |
parent | 08f57f7ffe5819e537301b1f1109fa4fc670bfff (diff) |
[MIPS] Cleanup memory barriers for weakly ordered systems.
Also the R4000 / R4600 LL/SC instructions imply a sync so no explicit sync
needed.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/futex.h')
-rw-r--r-- | include/asm-mips/futex.h | 22 |
1 files changed, 12 insertions, 10 deletions
diff --git a/include/asm-mips/futex.h b/include/asm-mips/futex.h index ed023eae0674..927a216bd530 100644 --- a/include/asm-mips/futex.h +++ b/include/asm-mips/futex.h | |||
@@ -1,19 +1,21 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (c) 2006 Ralf Baechle (ralf@linux-mips.org) | ||
7 | */ | ||
1 | #ifndef _ASM_FUTEX_H | 8 | #ifndef _ASM_FUTEX_H |
2 | #define _ASM_FUTEX_H | 9 | #define _ASM_FUTEX_H |
3 | 10 | ||
4 | #ifdef __KERNEL__ | 11 | #ifdef __KERNEL__ |
5 | 12 | ||
6 | #include <linux/futex.h> | 13 | #include <linux/futex.h> |
14 | #include <asm/barrier.h> | ||
7 | #include <asm/errno.h> | 15 | #include <asm/errno.h> |
8 | #include <asm/uaccess.h> | 16 | #include <asm/uaccess.h> |
9 | #include <asm/war.h> | 17 | #include <asm/war.h> |
10 | 18 | ||
11 | #ifdef CONFIG_SMP | ||
12 | #define __FUTEX_SMP_SYNC " sync \n" | ||
13 | #else | ||
14 | #define __FUTEX_SMP_SYNC | ||
15 | #endif | ||
16 | |||
17 | #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ | 19 | #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ |
18 | { \ | 20 | { \ |
19 | if (cpu_has_llsc && R10000_LLSC_WAR) { \ | 21 | if (cpu_has_llsc && R10000_LLSC_WAR) { \ |
@@ -27,7 +29,7 @@ | |||
27 | " .set mips3 \n" \ | 29 | " .set mips3 \n" \ |
28 | "2: sc $1, %2 \n" \ | 30 | "2: sc $1, %2 \n" \ |
29 | " beqzl $1, 1b \n" \ | 31 | " beqzl $1, 1b \n" \ |
30 | __FUTEX_SMP_SYNC \ | 32 | __WEAK_ORDERING_MB \ |
31 | "3: \n" \ | 33 | "3: \n" \ |
32 | " .set pop \n" \ | 34 | " .set pop \n" \ |
33 | " .set mips0 \n" \ | 35 | " .set mips0 \n" \ |
@@ -53,7 +55,7 @@ | |||
53 | " .set mips3 \n" \ | 55 | " .set mips3 \n" \ |
54 | "2: sc $1, %2 \n" \ | 56 | "2: sc $1, %2 \n" \ |
55 | " beqz $1, 1b \n" \ | 57 | " beqz $1, 1b \n" \ |
56 | __FUTEX_SMP_SYNC \ | 58 | __WEAK_ORDERING_MB \ |
57 | "3: \n" \ | 59 | "3: \n" \ |
58 | " .set pop \n" \ | 60 | " .set pop \n" \ |
59 | " .set mips0 \n" \ | 61 | " .set mips0 \n" \ |
@@ -150,7 +152,7 @@ futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) | |||
150 | " .set mips3 \n" | 152 | " .set mips3 \n" |
151 | "2: sc $1, %1 \n" | 153 | "2: sc $1, %1 \n" |
152 | " beqzl $1, 1b \n" | 154 | " beqzl $1, 1b \n" |
153 | __FUTEX_SMP_SYNC | 155 | __WEAK_ORDERING_MB |
154 | "3: \n" | 156 | "3: \n" |
155 | " .set pop \n" | 157 | " .set pop \n" |
156 | " .section .fixup,\"ax\" \n" | 158 | " .section .fixup,\"ax\" \n" |
@@ -177,7 +179,7 @@ futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) | |||
177 | " .set mips3 \n" | 179 | " .set mips3 \n" |
178 | "2: sc $1, %1 \n" | 180 | "2: sc $1, %1 \n" |
179 | " beqz $1, 1b \n" | 181 | " beqz $1, 1b \n" |
180 | __FUTEX_SMP_SYNC | 182 | __WEAK_ORDERING_MB |
181 | "3: \n" | 183 | "3: \n" |
182 | " .set pop \n" | 184 | " .set pop \n" |
183 | " .section .fixup,\"ax\" \n" | 185 | " .section .fixup,\"ax\" \n" |