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authorRalf Baechle <ralf@linux-mips.org>2005-05-31 07:49:19 -0400
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 14:31:17 -0400
commite50c0a8fa60da9ac0e0a70caa8a3a803815c1f2f (patch)
tree1928e8b0a4b7fb615e5a9f65dc934ba2e74cb9cd /include/asm-mips/dsp.h
parent10f650db1bcc193ea07d4f8c2f07315da38ea0c4 (diff)
Support the MIPS32 / MIPS64 DSP ASE.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/dsp.h')
-rw-r--r--include/asm-mips/dsp.h83
1 files changed, 83 insertions, 0 deletions
diff --git a/include/asm-mips/dsp.h b/include/asm-mips/dsp.h
new file mode 100644
index 000000000000..50f556bb4978
--- /dev/null
+++ b/include/asm-mips/dsp.h
@@ -0,0 +1,83 @@
1/*
2 * Copyright (C) 2005 Mips Technologies
3 * Author: Chris Dearman, chris@mips.com derived from fpu.h
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 */
10#ifndef _ASM_DSP_H
11#define _ASM_DSP_H
12
13#include <asm/cpu.h>
14#include <asm/cpu-features.h>
15#include <asm/hazards.h>
16#include <asm/mipsregs.h>
17
18#define DSP_DEFAULT 0x00000000
19#define DSP_MASK 0x1f
20
21#define __enable_dsp_hazard() \
22do { \
23 asm("_ehb"); \
24} while (0)
25
26static inline void __init_dsp(void)
27{
28 mthi1(0);
29 mtlo1(0);
30 mthi2(0);
31 mtlo2(0);
32 mthi3(0);
33 mtlo3(0);
34 wrdsp(DSP_DEFAULT, DSP_MASK);
35}
36
37static inline void init_dsp(void)
38{
39 if (cpu_has_dsp)
40 __init_dsp();
41}
42
43#define __save_dsp(tsk) \
44do { \
45 tsk->thread.dsp.dspr[0] = mfhi1(); \
46 tsk->thread.dsp.dspr[1] = mflo1(); \
47 tsk->thread.dsp.dspr[2] = mfhi2(); \
48 tsk->thread.dsp.dspr[3] = mflo2(); \
49 tsk->thread.dsp.dspr[4] = mfhi3(); \
50 tsk->thread.dsp.dspr[5] = mflo3(); \
51} while (0)
52
53#define save_dsp(tsk) \
54do { \
55 if (cpu_has_dsp) \
56 __save_dsp(tsk); \
57} while (0)
58
59#define __restore_dsp(tsk) \
60do { \
61 mthi1(tsk->thread.dsp.dspr[0]); \
62 mtlo1(tsk->thread.dsp.dspr[1]); \
63 mthi2(tsk->thread.dsp.dspr[2]); \
64 mtlo2(tsk->thread.dsp.dspr[3]); \
65 mthi3(tsk->thread.dsp.dspr[4]); \
66 mtlo3(tsk->thread.dsp.dspr[5]); \
67} while (0)
68
69#define restore_dsp(tsk) \
70do { \
71 if (cpu_has_dsp) \
72 __restore_dsp(tsk); \
73} while (0)
74
75#define __get_dsp_regs(tsk) \
76({ \
77 if (tsk == current) \
78 __save_dsp(current); \
79 \
80 tsk->thread.dsp.dspr; \
81})
82
83#endif /* _ASM_DSP_H */