diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2008-09-16 13:48:51 -0400 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2008-10-11 11:18:52 -0400 |
| commit | 384740dc49ea651ba350704d13ff6be9976e37fe (patch) | |
| tree | a6e80cad287ccae7a86d81bfa692fc96889c88ed /include/asm-mips/dsp.h | |
| parent | e8c7c482347574ecdd45c43e32c332d5fc2ece61 (diff) | |
MIPS: Move headfiles to new location below arch/mips/include
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/dsp.h')
| -rw-r--r-- | include/asm-mips/dsp.h | 85 |
1 files changed, 0 insertions, 85 deletions
diff --git a/include/asm-mips/dsp.h b/include/asm-mips/dsp.h deleted file mode 100644 index e9bfc0813c72..000000000000 --- a/include/asm-mips/dsp.h +++ /dev/null | |||
| @@ -1,85 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2005 Mips Technologies | ||
| 3 | * Author: Chris Dearman, chris@mips.com derived from fpu.h | ||
| 4 | * | ||
| 5 | * This program is free software; you can redistribute it and/or modify it | ||
| 6 | * under the terms of the GNU General Public License as published by the | ||
| 7 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 8 | * option) any later version. | ||
| 9 | */ | ||
| 10 | #ifndef _ASM_DSP_H | ||
| 11 | #define _ASM_DSP_H | ||
| 12 | |||
| 13 | #include <asm/cpu.h> | ||
| 14 | #include <asm/cpu-features.h> | ||
| 15 | #include <asm/hazards.h> | ||
| 16 | #include <asm/mipsregs.h> | ||
| 17 | |||
| 18 | #define DSP_DEFAULT 0x00000000 | ||
| 19 | #define DSP_MASK 0x3ff | ||
| 20 | |||
| 21 | #define __enable_dsp_hazard() \ | ||
| 22 | do { \ | ||
| 23 | asm("_ehb"); \ | ||
| 24 | } while (0) | ||
| 25 | |||
| 26 | static inline void __init_dsp(void) | ||
| 27 | { | ||
| 28 | mthi1(0); | ||
| 29 | mtlo1(0); | ||
| 30 | mthi2(0); | ||
| 31 | mtlo2(0); | ||
| 32 | mthi3(0); | ||
| 33 | mtlo3(0); | ||
| 34 | wrdsp(DSP_DEFAULT, DSP_MASK); | ||
| 35 | } | ||
| 36 | |||
| 37 | static inline void init_dsp(void) | ||
| 38 | { | ||
| 39 | if (cpu_has_dsp) | ||
| 40 | __init_dsp(); | ||
| 41 | } | ||
| 42 | |||
| 43 | #define __save_dsp(tsk) \ | ||
| 44 | do { \ | ||
| 45 | tsk->thread.dsp.dspr[0] = mfhi1(); \ | ||
| 46 | tsk->thread.dsp.dspr[1] = mflo1(); \ | ||
| 47 | tsk->thread.dsp.dspr[2] = mfhi2(); \ | ||
| 48 | tsk->thread.dsp.dspr[3] = mflo2(); \ | ||
| 49 | tsk->thread.dsp.dspr[4] = mfhi3(); \ | ||
| 50 | tsk->thread.dsp.dspr[5] = mflo3(); \ | ||
| 51 | tsk->thread.dsp.dspcontrol = rddsp(DSP_MASK); \ | ||
| 52 | } while (0) | ||
| 53 | |||
| 54 | #define save_dsp(tsk) \ | ||
| 55 | do { \ | ||
| 56 | if (cpu_has_dsp) \ | ||
| 57 | __save_dsp(tsk); \ | ||
| 58 | } while (0) | ||
| 59 | |||
| 60 | #define __restore_dsp(tsk) \ | ||
| 61 | do { \ | ||
| 62 | mthi1(tsk->thread.dsp.dspr[0]); \ | ||
| 63 | mtlo1(tsk->thread.dsp.dspr[1]); \ | ||
| 64 | mthi2(tsk->thread.dsp.dspr[2]); \ | ||
| 65 | mtlo2(tsk->thread.dsp.dspr[3]); \ | ||
| 66 | mthi3(tsk->thread.dsp.dspr[4]); \ | ||
| 67 | mtlo3(tsk->thread.dsp.dspr[5]); \ | ||
| 68 | wrdsp(tsk->thread.dsp.dspcontrol, DSP_MASK); \ | ||
| 69 | } while (0) | ||
| 70 | |||
| 71 | #define restore_dsp(tsk) \ | ||
| 72 | do { \ | ||
| 73 | if (cpu_has_dsp) \ | ||
| 74 | __restore_dsp(tsk); \ | ||
| 75 | } while (0) | ||
| 76 | |||
| 77 | #define __get_dsp_regs(tsk) \ | ||
| 78 | ({ \ | ||
| 79 | if (tsk == current) \ | ||
| 80 | __save_dsp(current); \ | ||
| 81 | \ | ||
| 82 | tsk->thread.dsp.dspr; \ | ||
| 83 | }) | ||
| 84 | |||
| 85 | #endif /* _ASM_DSP_H */ | ||